From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id C93471150 for ; Thu, 17 Jan 2019 21:41:14 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Jan 2019 12:41:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,489,1539673200"; d="scan'208";a="312738680" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga005.fm.intel.com with ESMTP; 17 Jan 2019 12:41:13 -0800 Received: from fmsmsx111.amr.corp.intel.com (10.18.116.5) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 17 Jan 2019 12:41:12 -0800 Received: from fmsmsx108.amr.corp.intel.com ([169.254.9.99]) by fmsmsx111.amr.corp.intel.com ([169.254.12.42]) with mapi id 14.03.0415.000; Thu, 17 Jan 2019 12:41:12 -0800 From: "Eads, Gage" To: "Gavin Hu (Arm Technology China)" , "Richardson, Bruce" CC: "dev@dpdk.org" , "olivier.matz@6wind.com" , "arybchenko@solarflare.com" , "Ananyev, Konstantin" , Honnappa Nagarahalli , "Ruifeng Wang (Arm Technology China)" , "Phil Yang (Arm Technology China)" Thread-Topic: [dpdk-dev] [PATCH v2 2/2] mempool/nb_stack: add non-blocking stack mempool Thread-Index: AQHUrSJso0tnZem+LkyN190Zvz4vjKWzG7mggABpq1yAAAr4AIAAkeyA///KWnA= Date: Thu, 17 Jan 2019 20:41:11 +0000 Message-ID: <9184057F7FC11744A2107296B6B8EB1E541C8ACF@FMSMSX108.amr.corp.intel.com> References: <20190110205538.24435-1-gage.eads@intel.com> <20190115223232.31866-1-gage.eads@intel.com> <20190115223232.31866-3-gage.eads@intel.com> <9184057F7FC11744A2107296B6B8EB1E541C83E4@FMSMSX108.amr.corp.intel.com> <20190117142036.GA379232@bricha3-MOBL.ger.corp.intel.com> <9184057F7FC11744A2107296B6B8EB1E541C84BB@FMSMSX108.amr.corp.intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNzMyMDEyY2QtY2IxYy00MTk2LTg1YjYtNjY0NmVkNzg1NjkzIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiQ084VkhHamFBKzVNaFVqMG5PcXRsTkpzbmlIbjhXd1FVTVdYWGMxVERJSkpQb2hyV2FRXC9VaUx4RzI0ZzJFNFkifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.1.200.108] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 2/2] mempool/nb_stack: add non-blocking stack mempool X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Jan 2019 20:41:15 -0000 > -----Original Message----- > From: Gavin Hu (Arm Technology China) [mailto:Gavin.Hu@arm.com] > Sent: Thursday, January 17, 2019 9:42 AM > To: Eads, Gage ; Richardson, Bruce > > Cc: dev@dpdk.org; olivier.matz@6wind.com; arybchenko@solarflare.com; > Ananyev, Konstantin ; Honnappa Nagarahalli > ; Ruifeng Wang (Arm Technology China) > ; Phil Yang (Arm Technology China) > > Subject: RE: [dpdk-dev] [PATCH v2 2/2] mempool/nb_stack: add non-blocking > stack mempool >=20 >=20 >=20 > > -----Original Message----- > > From: Eads, Gage > > Sent: Thursday, January 17, 2019 11:16 PM > > To: Richardson, Bruce > > Cc: Gavin Hu (Arm Technology China) ; dev@dpdk.org; > > olivier.matz@6wind.com; arybchenko@solarflare.com; Ananyev, Konstantin > > ; Honnappa Nagarahalli > > ; Ruifeng Wang (Arm Technology China) > > ; Phil Yang (Arm Technology > > China) > > Subject: RE: [dpdk-dev] [PATCH v2 2/2] mempool/nb_stack: add non- > > blocking stack mempool > > > > > > > > > -----Original Message----- > > > From: Richardson, Bruce > > > Sent: Thursday, January 17, 2019 8:21 AM > > > To: Eads, Gage > > > Cc: Gavin Hu (Arm Technology China) ; > > dev@dpdk.org; > > > olivier.matz@6wind.com; arybchenko@solarflare.com; Ananyev, > > Konstantin > > > ; Honnappa Nagarahalli > > > ; Ruifeng Wang (Arm Technology > > China) > > > ; Phil Yang (Arm Technology China) > > > > > > Subject: Re: [dpdk-dev] [PATCH v2 2/2] mempool/nb_stack: add non- > > blocking > > > stack mempool > > > > > > On Thu, Jan 17, 2019 at 02:11:22PM +0000, Eads, Gage wrote: > > > > > > > > > > > > > -----Original Message----- > > > > > From: Gavin Hu (Arm Technology China) [mailto:Gavin.Hu@arm.com] > > > > > Sent: Thursday, January 17, 2019 2:06 AM > > > > > To: Eads, Gage ; dev@dpdk.org > > > > > Cc: olivier.matz@6wind.com; arybchenko@solarflare.com; > > > > > Richardson, Bruce ; Ananyev, > > > > > Konstantin ; Honnappa Nagarahalli > > > > > ; Ruifeng Wang (Arm Technology > > China) > > > > > ; Phil Yang (Arm Technology China) > > > > > > > > > > Subject: RE: [dpdk-dev] [PATCH v2 2/2] mempool/nb_stack: add > > > > > non-blocking stack mempool > > > > > > > > > > > > > > > > -----Original Message----- > > > > > > From: dev On Behalf Of Gage Eads > > > > > > Sent: Wednesday, January 16, 2019 6:33 AM > > > > > > To: dev@dpdk.org > > > > > > Cc: olivier.matz@6wind.com; arybchenko@solarflare.com; > > > > > > bruce.richardson@intel.com; konstantin.ananyev@intel.com > > > > > > Subject: [dpdk-dev] [PATCH v2 2/2] mempool/nb_stack: add > > > > > > non-blocking stack mempool > > > > > > > > > > > > This commit adds support for non-blocking (linked list based) > > > > > > stack mempool handler. The stack uses a 128-bit compare-and- > > swap > > > > > > instruction, and thus is limited to x86_64. The 128-bit CAS > > > > > > atomically updates the stack top pointer and a modification > > > > > > counter, which protects against the ABA problem. > > > > > > > > > > > > In mempool_perf_autotest the lock-based stack outperforms the > > non- > > > > > > blocking handler*, however: > > > > > > - For applications with preemptible pthreads, a lock-based stac= k's > > > > > > worst-case performance (i.e. one thread being preempted while > > > > > > holding the spinlock) is much worse than the non-blocking sta= ck's. > > > > > > - Using per-thread mempool caches will largely mitigate the > > performance > > > > > > difference. > > > > > > > > > > > > *Test setup: x86_64 build with default config, dual-socket > > > > > > Xeon > > > > > > E5-2699 v4, running on isolcpus cores with a tickless scheduler= . > > > > > > The lock-based stack's rate_persec was 1x-3.5x the > > > > > > non-blocking > > stack's. > > > > > > > > > > > > Signed-off-by: Gage Eads > > > > > > --- > > > > > > MAINTAINERS | 4 + > > > > > > config/common_base | 1 + > > > > > > doc/guides/prog_guide/env_abstraction_layer.rst | 5 + > > > > > > drivers/mempool/Makefile | 3 + > > > > > > drivers/mempool/meson.build | 5 + > > > > > > drivers/mempool/nb_stack/Makefile | 23 ++++ > > > > > > drivers/mempool/nb_stack/meson.build | 4 + > > > > > > drivers/mempool/nb_stack/nb_lifo.h | 147 > > > > > > +++++++++++++++++++++ > > > > > > drivers/mempool/nb_stack/rte_mempool_nb_stack.c | 125 > > > > > > ++++++++++++++++++ > > > > > > .../nb_stack/rte_mempool_nb_stack_version.map | 4 + > > > > > > mk/rte.app.mk | 7 +- > > > > > > 11 files changed, 326 insertions(+), 2 deletions(-) create > > > > > > mode > > > > > > 100644 drivers/mempool/nb_stack/Makefile create mode 100644 > > > > > > drivers/mempool/nb_stack/meson.build > > > > > > create mode 100644 drivers/mempool/nb_stack/nb_lifo.h > > > > > > create mode 100644 > > > > > > drivers/mempool/nb_stack/rte_mempool_nb_stack.c > > > > > > create mode 100644 > > > > > > drivers/mempool/nb_stack/rte_mempool_nb_stack_version.map > > > > > > > > > > > > diff --git a/MAINTAINERS b/MAINTAINERS index > > 470f36b9c..5519d3323 > > > > > > 100644 > > > > > > --- a/MAINTAINERS > > > > > > +++ b/MAINTAINERS > > > > > > @@ -416,6 +416,10 @@ M: Artem V. Andreev > > > > > > > > > > > > M: Andrew Rybchenko > > > > > > F: drivers/mempool/bucket/ > > > > > > > > > > > > +Non-blocking stack memory pool > > > > > > +M: Gage Eads > > > > > > +F: drivers/mempool/nb_stack/ > > > > > > + > > > > > > > > > > > > Bus Drivers > > > > > > ----------- > > > > > > diff --git a/config/common_base b/config/common_base index > > > > > > 964a6956e..8a51f36b1 100644 > > > > > > --- a/config/common_base > > > > > > +++ b/config/common_base > > > > > > @@ -726,6 +726,7 @@ CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG=3Dn > > # > > > > > > CONFIG_RTE_DRIVER_MEMPOOL_BUCKET=3Dy > > > > > > CONFIG_RTE_DRIVER_MEMPOOL_BUCKET_SIZE_KB=3D64 > > > > > > +CONFIG_RTE_DRIVER_MEMPOOL_NB_STACK=3Dy > > > > > > > > > > NAK, as this applies to x86_64 only, it will break arm/ppc and > > > > > even 32bit i386 configurations. > > > > > > > > > > > > > Hi Gavin, > > > > > > > > This patch resolves that in the make and meson build files, which > > ensure that > > > the library is only built for x86-64 targets: >=20 > Looking down to the changes with Makefile and meson.build, it will be com= piled > out for arm/ppc/i386. That works at least. > But having this entry in the arm/ppc/i386 configurations is very strange,= since > they have no such implementations. > Why not put it into defconfig_x86_64-native-linuxapp-icc/gcc/clang to lim= it the > scope? >=20 Certainly, that's reasonable -- it simply slipped my mind. I'll address thi= s in the next version. Thanks, Gage > IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended reci= pient, > please notify the sender immediately and do not disclose the contents to = any > other person, use it for any purpose, or store or copy the information in= any > medium. Thank you.