From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 8550A1B3A3 for ; Thu, 28 Mar 2019 17:22:46 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Mar 2019 09:22:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,280,1549958400"; d="scan'208";a="146054045" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga002.jf.intel.com with ESMTP; 28 Mar 2019 09:22:45 -0700 Received: from FMSMSX110.amr.corp.intel.com (10.18.116.10) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 28 Mar 2019 09:22:44 -0700 Received: from fmsmsx108.amr.corp.intel.com ([169.254.9.216]) by FMSMSX110.amr.corp.intel.com ([169.254.14.3]) with mapi id 14.03.0415.000; Thu, 28 Mar 2019 09:22:44 -0700 From: "Eads, Gage" To: Thomas Monjalon CC: "dev@dpdk.org" , "olivier.matz@6wind.com" , "arybchenko@solarflare.com" , "Richardson, Bruce" , "Ananyev, Konstantin" , "gavin.hu@arm.com" , "Honnappa.Nagarahalli@arm.com" , "nd@arm.com" , "chaozhu@linux.vnet.ibm.com" , "jerinj@marvell.com" , "hemant.agrawal@nxp.com" , "david.marchand@redhat.com" Thread-Topic: [dpdk-dev] [PATCH v3 1/1] eal: add 128-bit compare exchange (x86-64 only) Thread-Index: AQHU5PKYXCjA8Yk1o0S/OoGYI5/C7KYhMsgg Date: Thu, 28 Mar 2019 16:22:44 +0000 Message-ID: <9184057F7FC11744A2107296B6B8EB1E5420CDED@FMSMSX108.amr.corp.intel.com> References: <20190222154640.22029-1-gage.eads@intel.com> <20190304205133.2248-1-gage.eads@intel.com> <20190304205133.2248-2-gage.eads@intel.com> <3387191.pRBmEOjPGs@xps> In-Reply-To: <3387191.pRBmEOjPGs@xps> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZWMwMDcxNDUtZGI2MS00ZWNkLWI4ODQtOTIwOTBlZjgzMjM4IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoic3I3WTdIQkFRRmhwNVZZSUtUMXZFRXNcL3lkeG54ZVF4ck80cGFTa2tNcjRhYVVxcnlDYllKMzRKQ0lMNjgrS1cifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.1.200.108] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 1/1] eal: add 128-bit compare exchange (x86-64 only) X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 28 Mar 2019 16:22:46 -0000 > 04/03/2019 21:51, Gage Eads: > > --- a/lib/librte_eal/common/include/generic/rte_atomic.h > > +++ b/lib/librte_eal/common/include/generic/rte_atomic.h > > +#if defined(RTE_ARCH_X86_64) > > +/** > > + * 128-bit integer structure. > > + */ > > +RTE_STD_C11 > > +typedef struct { > > + RTE_STD_C11 > > + union { > > + uint64_t val[2]; > > + __int128 int128; > > + }; > > +} __rte_aligned(16) rte_int128_t; >=20 > Why adding an arch-specific definition in a generic file? > Can we move it to the x86_64 file? >=20 We can. I put it in the generic header in anticipation of other ISA impleme= ntations coming later, and since the atomic operations are documented in th= e generic header (although that ifdef appears to prevent it from being incl= uded in doxygen output). I'll move it to x86/rte_atomic_64.h if that's preferred, and we can conside= r moving it back to generic as other implementations are added. Thanks, Gage From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id EFC66A0679 for ; Thu, 28 Mar 2019 17:22:48 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D746E1B1F3; Thu, 28 Mar 2019 17:22:47 +0100 (CET) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 8550A1B3A3 for ; Thu, 28 Mar 2019 17:22:46 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Mar 2019 09:22:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,280,1549958400"; d="scan'208";a="146054045" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga002.jf.intel.com with ESMTP; 28 Mar 2019 09:22:45 -0700 Received: from FMSMSX110.amr.corp.intel.com (10.18.116.10) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 28 Mar 2019 09:22:44 -0700 Received: from fmsmsx108.amr.corp.intel.com ([169.254.9.216]) by FMSMSX110.amr.corp.intel.com ([169.254.14.3]) with mapi id 14.03.0415.000; Thu, 28 Mar 2019 09:22:44 -0700 From: "Eads, Gage" To: Thomas Monjalon CC: "dev@dpdk.org" , "olivier.matz@6wind.com" , "arybchenko@solarflare.com" , "Richardson, Bruce" , "Ananyev, Konstantin" , "gavin.hu@arm.com" , "Honnappa.Nagarahalli@arm.com" , "nd@arm.com" , "chaozhu@linux.vnet.ibm.com" , "jerinj@marvell.com" , "hemant.agrawal@nxp.com" , "david.marchand@redhat.com" Thread-Topic: [dpdk-dev] [PATCH v3 1/1] eal: add 128-bit compare exchange (x86-64 only) Thread-Index: AQHU5PKYXCjA8Yk1o0S/OoGYI5/C7KYhMsgg Date: Thu, 28 Mar 2019 16:22:44 +0000 Message-ID: <9184057F7FC11744A2107296B6B8EB1E5420CDED@FMSMSX108.amr.corp.intel.com> References: <20190222154640.22029-1-gage.eads@intel.com> <20190304205133.2248-1-gage.eads@intel.com> <20190304205133.2248-2-gage.eads@intel.com> <3387191.pRBmEOjPGs@xps> In-Reply-To: <3387191.pRBmEOjPGs@xps> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZWMwMDcxNDUtZGI2MS00ZWNkLWI4ODQtOTIwOTBlZjgzMjM4IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoic3I3WTdIQkFRRmhwNVZZSUtUMXZFRXNcL3lkeG54ZVF4ck80cGFTa2tNcjRhYVVxcnlDYllKMzRKQ0lMNjgrS1cifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.1.200.108] Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 1/1] eal: add 128-bit compare exchange (x86-64 only) X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190328162244.sy4Q0VsrL0oUfxzJCNYzUHk1FEcTkcFZmBev-jf6pDQ@z> > 04/03/2019 21:51, Gage Eads: > > --- a/lib/librte_eal/common/include/generic/rte_atomic.h > > +++ b/lib/librte_eal/common/include/generic/rte_atomic.h > > +#if defined(RTE_ARCH_X86_64) > > +/** > > + * 128-bit integer structure. > > + */ > > +RTE_STD_C11 > > +typedef struct { > > + RTE_STD_C11 > > + union { > > + uint64_t val[2]; > > + __int128 int128; > > + }; > > +} __rte_aligned(16) rte_int128_t; >=20 > Why adding an arch-specific definition in a generic file? > Can we move it to the x86_64 file? >=20 We can. I put it in the generic header in anticipation of other ISA impleme= ntations coming later, and since the atomic operations are documented in th= e generic header (although that ifdef appears to prevent it from being incl= uded in doxygen output). I'll move it to x86/rte_atomic_64.h if that's preferred, and we can conside= r moving it back to generic as other implementations are added. Thanks, Gage