From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 59CD2A0A02; Thu, 25 Mar 2021 09:06:59 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D68284067B; Thu, 25 Mar 2021 09:06:58 +0100 (CET) Received: from out5-smtp.messagingengine.com (out5-smtp.messagingengine.com [66.111.4.29]) by mails.dpdk.org (Postfix) with ESMTP id AB50440147 for ; Thu, 25 Mar 2021 09:06:57 +0100 (CET) Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailout.nyi.internal (Postfix) with ESMTP id 483155C0097; Thu, 25 Mar 2021 04:06:57 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute2.internal (MEProxy); Thu, 25 Mar 2021 04:06:57 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm3; bh= TTHQnE0aDaxmOSiKV+UgN5hRB3MVtuJjVq6ZIJ+7QJs=; b=QkPhroZIf9bUgV6a HYTsTfx+2gZSs2cv1JPT9RSjN/y/C8oyyg38C+QuS/z9r3NJvpyOMleFHKovycGq LQONhSbM+oBMr7MRuO7IH4ox3W8ZMQGgVH9QDmnMIQHAhaVIGRvm4D/QOa4MWhL2 TpSYa+BXq2NiwvdE9me+mOGZkPXbk54b5FkQvzcTAy7MEqfvOiGs5b6m5nvAFThQ yxQcpHoeHykDweqGhOG5L1aSA/hccBF7INnvcrYjAlG0fJq2PfQKJhnNB7K3Aux3 mTJGgHXtkI7NeeDWJZrK+hqL3y4hrs0yllPP2OYaeus4lBLrJVTw1xbmXgaTgDVv rUmq0A== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm2; bh=TTHQnE0aDaxmOSiKV+UgN5hRB3MVtuJjVq6ZIJ+7Q Js=; b=Gzwo+f1+iEoV8EGK3oi4F+DoSL8bnOdyFlDQUtRGhjECDJw593Gqf2tKK cORMQduNmpoMxLnVKO5cQmSkDNNepvf+70vefh4Ex4b0MbvgFt7yNjogKZhvB91u AuU20QzdJ93j2OrKfH/JfQEAQkN0Wh1QWSewNY4Z8mXKT4qTZg7WKHCL7DBxqRf6 ZN7fPYfkNNpyEZLRn+Ab5EX7mQV7mXh9Kz+oXXxbvFbs/Vxyd5iH4QyPapikNm5G 9XCXBOeCNvaE3pcVHfxQRzblaid44E1+xnkELvCsHskwgHmAUu38eVRbmYUY2ApW VGj2GmcoX3m94qDUlAEpXOkhPX0Yg== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrudegledgudduhecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkjghfggfgtgesthfuredttddtvdenucfhrhhomhepvfhhohhm rghsucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenuc ggtffrrghtthgvrhhnpedugefgvdefudfftdefgeelgffhueekgfffhfeujedtteeutdej ueeiiedvffegheenucfkphepjeejrddufeegrddvtdefrddukeegnecuvehluhhsthgvrh fuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepthhhohhmrghssehmohhnjhgr lhhonhdrnhgvth X-ME-Proxy: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id E73E624005A; Thu, 25 Mar 2021 04:06:55 -0400 (EDT) From: Thomas Monjalon To: "Amber, Kumar" , "Wang, Yipeng1" Cc: "dev@dpdk.org" , "Richardson, Bruce" , "Gobriel, Sameh" Date: Thu, 25 Mar 2021 09:06:53 +0100 Message-ID: <9326090.qLjmXhQq0I@thomas> In-Reply-To: References: <20210112072446.880122-1-kumar.amber@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH v1] lib/hash: support non sse42 cpu architecture X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 24/03/2021 23:59, Wang, Yipeng1: > From: kumar amber > > > > add _SSE42_ flag to enable compilation of > > sse42 specific instructions only on supported architecture > > > > Signed-off-by: kumar amber > > --- > > lib/librte_hash/rte_hash_crc.h | 16 ++++++++-------- > > 1 file changed, 8 insertions(+), 8 deletions(-) > > > > diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h > > index 3e131aa6bb..e9f063780c 100644 > > --- a/lib/librte_hash/rte_hash_crc.h > > +++ b/lib/librte_hash/rte_hash_crc.h > > @@ -358,7 +358,7 @@ crc32c_2words(uint64_t data, uint32_t init_val) > > return crc; > > } > > > > -#if defined(RTE_ARCH_X86) > > +#if defined(RTE_ARCH_X86) && defined(__SSE42__) > > static inline uint32_t > > crc32c_sse42_u8(uint8_t data, uint32_t init_val) { @@ -404,7 +404,7 @@ > > crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val) } #endif > > ... > > > -#if defined RTE_ARCH_X86 > > +#if defined(RTE_ARCH_X86) && defined(__SSE42__) > > if (likely(crc32_alg & CRC32_SSE42)) > > return crc32c_sse42_u64_mimic(data, init_val); #endif > > -- > > 2.25.1 > > [Wang, Yipeng] > Hi, Kumar, thanks for the patch. > I think the minimum required machine for x86 is sse4.2 compatible already. So I wonder if we really need this. Yes, that's why I don't understand this patch. > Also, I think the right way to check machine flag in DPDK should be: > #If defined (RTE_MACHINE_CPUFLAG_SSE4_2) These macros have been removed in DPDK 20.11. > Instead of using compiler dependent macro. Compiler macros are well standardized, it is OK.