From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DC43EA04B5; Wed, 13 Jan 2021 14:40:33 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 65905140D20; Wed, 13 Jan 2021 14:40:33 +0100 (CET) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id B7E76140D1E for ; Wed, 13 Jan 2021 14:40:31 +0100 (CET) IronPort-SDR: OVZnls1utQSsb1cdvDcPTsDqB08c3vz/qIsS3w8yctWbY6l+isAPtJUJexpoG5vN9gKoHWX5SL 98yh4Ls/bF2g== X-IronPort-AV: E=McAfee;i="6000,8403,9862"; a="175620512" X-IronPort-AV: E=Sophos;i="5.79,344,1602572400"; d="scan'208";a="175620512" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2021 05:40:30 -0800 IronPort-SDR: 9gU5qH1cCTqL+/FQ1aglyGVVwjtinD2TfdOJmIrj1Frt8KCuNjRABDGc+eGFHIQM7i4PUD+sWX rN6408ck3abg== X-IronPort-AV: E=Sophos;i="5.79,344,1602572400"; d="scan'208";a="363884420" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.253.194]) ([10.213.253.194]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2021 05:40:28 -0800 To: Leyi Rong , qi.z.zhang@intel.com, bruce.richardson@intel.com, beilei.xing@intel.com Cc: dev@dpdk.org References: <20201215021945.103396-1-leyi.rong@intel.com> <20210107074420.6335-1-leyi.rong@intel.com> <20210107074420.6335-2-leyi.rong@intel.com> From: Ferruh Yigit Message-ID: <941277f6-1388-7cf6-8cd5-9c6c40cd5634@intel.com> Date: Wed, 13 Jan 2021 13:40:24 +0000 MIME-Version: 1.0 In-Reply-To: <20210107074420.6335-2-leyi.rong@intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v2 1/3] net/i40e: remove devarg use-latest-supported-vec X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 1/7/2021 7:44 AM, Leyi Rong wrote: > As eal parameter --force-max-simd-bitwidth is already introduced, > to make it more clear when setting rx/tx function, remove > devarg use-latest-supported-vec support. > > Signed-off-by: Leyi Rong <...> > @@ -3154,20 +3124,33 @@ i40e_set_rx_function(struct rte_eth_dev *dev) > break; > } > } > + > + if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 || > + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) && > + rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256) > + use_avx2 = true; > } Hi Leyi, The cpu flags, 'RTE_CPUFLAG_AVX2' & 'RTE_CPUFLAG_AVX512F', are only defined for x86 and causing build error for other architectures. And what about extracting that logic into a static inline function, this makes code more clean, and in that function other architectures return 'use_avx2' false straightaway and can do the checks only for x86?