From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id D67F52B8B for ; Mon, 2 Jan 2017 11:18:36 +0100 (CET) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP; 02 Jan 2017 02:18:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,432,1477983600"; d="scan'208";a="1088924742" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga001.fm.intel.com with ESMTP; 02 Jan 2017 02:18:35 -0800 Received: from fmsmsx158.amr.corp.intel.com (10.18.116.75) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 2 Jan 2017 02:18:35 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by fmsmsx158.amr.corp.intel.com (10.18.116.75) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 2 Jan 2017 02:18:34 -0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.177]) by SHSMSX103.ccr.corp.intel.com ([10.239.4.69]) with mapi id 14.03.0248.002; Mon, 2 Jan 2017 18:18:32 +0800 From: "Xing, Beilei" To: "Zhao1, Wei" , "dev@dpdk.org" CC: "Lu, Wenzhuo" , "Zhao1, Wei" Thread-Topic: [dpdk-dev] [PATCH v2 09/18] net/ixgbe: store and restore L2 tunnel configuration Thread-Index: AQHSYnLKSqk4ljI3A0GNqyF8veiBcKEk/Xdg Date: Mon, 2 Jan 2017 10:18:31 +0000 Message-ID: <94479800C636CB44BD422CB454846E013158CE4F@SHSMSX101.ccr.corp.intel.com> References: <1483084390-53159-1-git-send-email-wei.zhao1@intel.com> <1483084390-53159-10-git-send-email-wei.zhao1@intel.com> In-Reply-To: <1483084390-53159-10-git-send-email-wei.zhao1@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMGI3ODkxNTQtZGY0MS00OTgwLTk0NmMtMGNkMjkzM2NlMDJjIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6InRpNXlxTmkrOHZBdVwvdVBqOGE0V3B3cllMZlljRkUrXC9jMFNwTld0SHlGMD0ifQ== x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 09/18] net/ixgbe: store and restore L2 tunnel configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 02 Jan 2017 10:18:37 -0000 > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Wei Zhao > Sent: Friday, December 30, 2016 3:53 PM > To: dev@dpdk.org > Cc: Lu, Wenzhuo ; Zhao1, Wei > Subject: [dpdk-dev] [PATCH v2 09/18] net/ixgbe: store and restore L2 tunn= el > configuration >=20 > Add support for store and restore L2 tunnel filter in SW. The whole patch set is related to filter, so do you think it's better to mo= ve the patch from his patch set since it's related to configuration? Please= help to check. >=20 > Signed-off-by: Wenzhuo Lu > Signed-off-by: Wei Zhao > --- > drivers/net/ixgbe/ixgbe_ethdev.c | 36 > ++++++++++++++++++++++++++++++++++++ > drivers/net/ixgbe/ixgbe_ethdev.h | 3 +++ > 2 files changed, 39 insertions(+) >=20 > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c > b/drivers/net/ixgbe/ixgbe_ethdev.c > index 5c39ffa..d68de65 100644 > --- a/drivers/net/ixgbe/ixgbe_ethdev.c > +++ b/drivers/net/ixgbe/ixgbe_ethdev.c > @@ -385,6 +385,7 @@ static int ixgbe_dev_udp_tunnel_port_add(struct > rte_eth_dev *dev, static int ixgbe_dev_udp_tunnel_port_del(struct > rte_eth_dev *dev, > struct rte_eth_udp_tunnel *udp_tunnel); static int > ixgbe_filter_restore(struct rte_eth_dev *dev); > +static void ixgbe_l2_tunnel_conf(struct rte_eth_dev *dev); >=20 > /* > * Define VF Stats MACRO for Non "cleared on read" register @@ -1444,6 > +1445,9 @@ static int ixgbe_l2_tn_filter_init(struct rte_eth_dev *eth_dev= ) > "Failed to allocate memory for L2 TN hash map!"); > return -ENOMEM; > } > + l2_tn_info->e_tag_en =3D FALSE; > + l2_tn_info->e_tag_fwd_en =3D FALSE; > + l2_tn_info->e_tag_ether_type =3D DEFAULT_ETAG_ETYPE; >=20 > return 0; > } > @@ -2502,6 +2506,7 @@ ixgbe_dev_start(struct rte_eth_dev *dev) >=20 > /* resume enabled intr since hw reset */ > ixgbe_enable_intr(dev); > + ixgbe_l2_tunnel_conf(dev); > ixgbe_filter_restore(dev); >=20 > return 0; > @@ -7038,12 +7043,15 @@ ixgbe_dev_l2_tunnel_eth_type_conf(struct > rte_eth_dev *dev, { > int ret =3D 0; > struct ixgbe_hw *hw =3D > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + struct ixgbe_l2_tn_info *l2_tn_info =3D > + IXGBE_DEV_PRIVATE_TO_L2_TN_INFO(dev->data->dev_private); >=20 > if (l2_tunnel =3D=3D NULL) > return -EINVAL; >=20 > switch (l2_tunnel->l2_tunnel_type) { > case RTE_L2_TUNNEL_TYPE_E_TAG: > + l2_tn_info->e_tag_ether_type =3D l2_tunnel->ether_type; > ret =3D ixgbe_update_e_tag_eth_type(hw, l2_tunnel->ether_type); > break; > default: > @@ -7082,9 +7090,12 @@ ixgbe_dev_l2_tunnel_enable(struct rte_eth_dev > *dev, { > int ret =3D 0; > struct ixgbe_hw *hw =3D > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + struct ixgbe_l2_tn_info *l2_tn_info =3D > + IXGBE_DEV_PRIVATE_TO_L2_TN_INFO(dev->data->dev_private); >=20 > switch (l2_tunnel_type) { > case RTE_L2_TUNNEL_TYPE_E_TAG: > + l2_tn_info->e_tag_en =3D TRUE; > ret =3D ixgbe_e_tag_enable(hw); > break; > default: > @@ -7123,9 +7134,12 @@ ixgbe_dev_l2_tunnel_disable(struct rte_eth_dev > *dev, { > int ret =3D 0; > struct ixgbe_hw *hw =3D > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + struct ixgbe_l2_tn_info *l2_tn_info =3D > + IXGBE_DEV_PRIVATE_TO_L2_TN_INFO(dev->data->dev_private); >=20 > switch (l2_tunnel_type) { > case RTE_L2_TUNNEL_TYPE_E_TAG: > + l2_tn_info->e_tag_en =3D FALSE; > ret =3D ixgbe_e_tag_disable(hw); > break; > default: > @@ -7432,10 +7446,13 @@ ixgbe_dev_l2_tunnel_forwarding_enable > (struct rte_eth_dev *dev, > enum rte_eth_tunnel_type l2_tunnel_type) { > + struct ixgbe_l2_tn_info *l2_tn_info =3D > + IXGBE_DEV_PRIVATE_TO_L2_TN_INFO(dev->data->dev_private); > int ret =3D 0; >=20 > switch (l2_tunnel_type) { > case RTE_L2_TUNNEL_TYPE_E_TAG: > + l2_tn_info->e_tag_fwd_en =3D TRUE; > ret =3D ixgbe_e_tag_forwarding_en_dis(dev, 1); > break; > default: > @@ -7453,10 +7470,13 @@ ixgbe_dev_l2_tunnel_forwarding_disable > (struct rte_eth_dev *dev, > enum rte_eth_tunnel_type l2_tunnel_type) { > + struct ixgbe_l2_tn_info *l2_tn_info =3D > + IXGBE_DEV_PRIVATE_TO_L2_TN_INFO(dev->data->dev_private); > int ret =3D 0; >=20 > switch (l2_tunnel_type) { > case RTE_L2_TUNNEL_TYPE_E_TAG: > + l2_tn_info->e_tag_fwd_en =3D FALSE; > ret =3D ixgbe_e_tag_forwarding_en_dis(dev, 0); > break; > default: > @@ -7950,6 +7970,22 @@ ixgbe_filter_restore(struct rte_eth_dev *dev) > return 0; > } >=20 > +static void > +ixgbe_l2_tunnel_conf(struct rte_eth_dev *dev) { > + struct ixgbe_l2_tn_info *l2_tn_info =3D > + IXGBE_DEV_PRIVATE_TO_L2_TN_INFO(dev->data->dev_private); > + struct ixgbe_hw *hw =3D > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + > + if (l2_tn_info->e_tag_en) > + (void)ixgbe_e_tag_enable(hw); > + > + if (l2_tn_info->e_tag_fwd_en) > + (void)ixgbe_e_tag_forwarding_en_dis(dev, 1); > + > + (void)ixgbe_update_e_tag_eth_type(hw, l2_tn_info->e_tag_ether_type); } > + > RTE_PMD_REGISTER_PCI(net_ixgbe, rte_ixgbe_pmd.pci_drv); > RTE_PMD_REGISTER_PCI_TABLE(net_ixgbe, pci_id_ixgbe_map); > RTE_PMD_REGISTER_KMOD_DEP(net_ixgbe, "* igb_uio | uio_pci_generic | > vfio"); diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h > b/drivers/net/ixgbe/ixgbe_ethdev.h > index d6253ad..6327962 100644 > --- a/drivers/net/ixgbe/ixgbe_ethdev.h > +++ b/drivers/net/ixgbe/ixgbe_ethdev.h > @@ -307,6 +307,9 @@ struct ixgbe_l2_tn_info { > struct ixgbe_l2_tn_filter_list l2_tn_list; > struct ixgbe_l2_tn_filter **hash_map; > struct rte_hash *hash_handle; > + bool e_tag_en; /* e-tag enabled */ > + bool e_tag_fwd_en; /* e-tag based forwarding enabled */ > + bool e_tag_ether_type; /* ether type for e-tag */ > }; >=20 > /* > -- > 2.5.5