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Thu, 18 May 2017 09:38:24 +0800 From: "Xing, Beilei" To: Michael Lilja , "Zhang, Helin" , "Wu, Jingjing" CC: "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v8] net/i40e: improved FDIR programming times Thread-Index: AQHSzx4Lr455W3EL2E2Q2+m9i4/4y6H5UFcQ Date: Thu, 18 May 2017 01:38:23 +0000 Message-ID: <94479800C636CB44BD422CB454846E0131FAFCAA@SHSMSX101.ccr.corp.intel.com> References: <20170517103807.18746-1-ml@napatech.com> <20170517145757.22299-1-ml@napatech.com> In-Reply-To: <20170517145757.22299-1-ml@napatech.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v8] net/i40e: improved FDIR programming times X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 May 2017 01:38:45 -0000 Hi, > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Michael Lilja > Sent: Wednesday, May 17, 2017 10:58 PM > To: Zhang, Helin ; Wu, Jingjing > > Cc: dev@dpdk.org; Michael Lilja > Subject: [dpdk-dev] [PATCH v8] net/i40e: improved FDIR programming times >=20 > Previously, the FDIR programming time is +11ms on i40e. > This patch will result in an average programming time of 22usec with a ma= x of > 60usec . >=20 > Signed-off-by: Michael Lilja >=20 > --- > v8: > * Merged two defines into one handling max wait time >=20 > v7: > * Code style changes >=20 > v6: > * Fixed code style issues >=20 > v5: > * Reinitialization of "i" inconsistent with original intent >=20 > v4: > * Code style fix >=20 > v3: > * Replaced commit message >=20 > v2: > * Code style fix >=20 > v1: > * Initial version > --- > --- > drivers/net/i40e/i40e_fdir.c | 26 ++++++++++++-------------- > 1 file changed, 12 insertions(+), 14 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c = index > 28cc554f5..f94e1c3b8 100644 > --- a/drivers/net/i40e/i40e_fdir.c > +++ b/drivers/net/i40e/i40e_fdir.c > @@ -73,9 +73,8 @@ > #define I40E_FDIR_IPv6_PAYLOAD_LEN 380 > #define I40E_FDIR_UDP_DEFAULT_LEN 400 >=20 > -/* Wait count and interval for fdir filter programming */ > -#define I40E_FDIR_WAIT_COUNT 10 > -#define I40E_FDIR_WAIT_INTERVAL_US 1000 > +/* Wait time for fdir filter programming */ #define > +I40E_FDIR_MAX_WAIT_US 10000 >=20 > /* Wait count and interval for fdir filter flush */ > #define I40E_FDIR_FLUSH_RETRY 50 > @@ -1295,28 +1294,27 @@ i40e_fdir_filter_programming(struct i40e_pf *pf, > /* Update the tx tail register */ > rte_wmb(); > I40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail); > - > - for (i =3D 0; i < I40E_FDIR_WAIT_COUNT; i++) { > - rte_delay_us(I40E_FDIR_WAIT_INTERVAL_US); > + for (i =3D 0; i < I40E_FDIR_MAX_WAIT_US; i++) { > if ((txdp->cmd_type_offset_bsz & >=20 > rte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) =3D=3D >=20 > rte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE)) > break; > + rte_delay_us(1); > } > - if (i >=3D I40E_FDIR_WAIT_COUNT) { > + if (i >=3D I40E_FDIR_MAX_WAIT_US) { > PMD_DRV_LOG(ERR, "Failed to program FDIR filter:" > " time out to get DD on tx queue."); > return -ETIMEDOUT; > } > /* totally delay 10 ms to check programming status*/ > - rte_delay_us((I40E_FDIR_WAIT_COUNT - i) * > I40E_FDIR_WAIT_INTERVAL_US); > - if (i40e_check_fdir_programming_status(rxq) < 0) { > - PMD_DRV_LOG(ERR, "Failed to program FDIR filter:" > - " programming status reported."); > - return -ENOSYS; > + for (; i < I40E_FDIR_MAX_WAIT_US; i++) { > + if (i40e_check_fdir_programming_status(rxq) >=3D 0) > + return 0; > + rte_delay_us(1); > } > - > - return 0; > + PMD_DRV_LOG(ERR, "Failed to program FDIR filter:" > + " programming status reported."); > + return -ETIMEDOUT; > } >=20 > /* > -- > 2.12.2 Acked-by: Beilei Xing