From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id D3E091B01C for ; Thu, 11 Jan 2018 08:06:19 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Jan 2018 23:06:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,343,1511856000"; d="scan'208";a="26274010" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga002.jf.intel.com with ESMTP; 10 Jan 2018 23:06:17 -0800 Received: from fmsmsx114.amr.corp.intel.com (10.18.116.8) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 10 Jan 2018 23:06:16 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX114.amr.corp.intel.com (10.18.116.8) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 10 Jan 2018 23:06:16 -0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.159]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.93]) with mapi id 14.03.0319.002; Thu, 11 Jan 2018 15:06:14 +0800 From: "Xing, Beilei" To: Tonghao Zhang , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH 4/5] net/ixgbevf: add check for rte_intr_enable. Thread-Index: AQHThi9JCwwAEquYwkCBDsNK8NRpvqNuRtiQ Date: Thu, 11 Jan 2018 07:06:13 +0000 Message-ID: <94479800C636CB44BD422CB454846E013208AC68@SHSMSX101.ccr.corp.intel.com> References: <1515161439-4792-1-git-send-email-xiangxia.m.yue@gmail.com> <1515161439-4792-4-git-send-email-xiangxia.m.yue@gmail.com> In-Reply-To: <1515161439-4792-4-git-send-email-xiangxia.m.yue@gmail.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 4/5] net/ixgbevf: add check for rte_intr_enable. X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Jan 2018 07:06:20 -0000 > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Tonghao Zhang > Sent: Friday, January 5, 2018 10:11 PM > To: dev@dpdk.org > Cc: Tonghao Zhang > Subject: [dpdk-dev] [PATCH 4/5] net/ixgbevf: add check for rte_intr_enabl= e. The patch is not only for ixgbevf, but also for ixgbe, right? so how about changing the title with net/ixgbe started? > When we bind the ixgbevf to vfio and call the rte_eth_dev_rx_intr_enable > and rte_eth_dev_rx_intr_disable frequently, the interrupt setting > (msi_set_mask_bit) will take more CPU as show below. rte_intr_enable call > the ioctl to map the fd to interrupts frequently. >=20 > perf top: > 5.45% [kernel] [k] msi_set_mask_bit >=20 > It is unnecessary to call the rte_intr_enable in > ixgbe_dev_rx_queue_intr_enable. because the fds has been mapped to > interrupt and not unmapped in ixgbe_dev_rx_queue_intr_disable. >=20 > This patch add checks for using VFIO. With the patch, msi_set_mask_bit i= s > not listed in perl any more. Any suggestion will be welcome. >=20 > Signed-off-by: Tonghao Zhang > --- > drivers/net/ixgbe/ixgbe_ethdev.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) >=20 > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c > b/drivers/net/ixgbe/ixgbe_ethdev.c > index e929235..79e4097 100644 > --- a/drivers/net/ixgbe/ixgbe_ethdev.c > +++ b/drivers/net/ixgbe/ixgbe_ethdev.c > @@ -5610,7 +5610,9 @@ static void ixgbevf_set_vfta_all(struct rte_eth_dev > *dev, bool on) > RTE_SET_USED(queue_id); > IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, intr->mask); >=20 > - rte_intr_enable(intr_handle); > + if (intr_handle->type =3D=3D RTE_INTR_HANDLE_UIO || > + intr_handle->type =3D=3D RTE_INTR_HANDLE_UIO_INTX) > + rte_intr_enable(intr_handle); For igb_uio, did you check if it's necessary to call rte_intr_enable every = time? Since rte interrupt is not disabled during ixgbevf_dev_rx_queue_intr_= disable. >=20 > return 0; > } > @@ -5659,7 +5661,10 @@ static void ixgbevf_set_vfta_all(struct > rte_eth_dev *dev, bool on) > mask &=3D (1 << (queue_id - 32)); > IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); > } > - rte_intr_enable(intr_handle); > + > + if (intr_handle->type =3D=3D RTE_INTR_HANDLE_UIO || > + intr_handle->type =3D=3D RTE_INTR_HANDLE_UIO_INTX) > + rte_intr_enable(intr_handle); The same comment as above. >=20 > return 0; > } > -- > 1.8.3.1