From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 51ED3A04F5; Wed, 11 Dec 2019 23:51:30 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6B33C2BD3; Wed, 11 Dec 2019 23:51:29 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 008571F5 for ; Wed, 11 Dec 2019 23:51:26 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Dec 2019 14:51:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,303,1571727600"; d="scan'208";a="215928515" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga006.jf.intel.com with ESMTP; 11 Dec 2019 14:51:25 -0800 Received: from fmsmsx116.amr.corp.intel.com (10.18.116.20) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 11 Dec 2019 14:51:24 -0800 Received: from shsmsx105.ccr.corp.intel.com (10.239.4.158) by fmsmsx116.amr.corp.intel.com (10.18.116.20) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 11 Dec 2019 14:51:24 -0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.19]) by SHSMSX105.ccr.corp.intel.com ([169.254.11.72]) with mapi id 14.03.0439.000; Thu, 12 Dec 2019 06:51:22 +0800 From: "Xing, Beilei" To: "Sexton, Rory" , "dev@dpdk.org" CC: "Zhang, Qi Z" , "adrien.mazarguil@6wind.com" , "Jagus, DariuszX" Thread-Topic: [PATCH] net/i40e: Add new customized pctype for l2tpv3 Thread-Index: AQHVqq1MvC+zG0sRoEGjgDeySHEL/Ke1kESg Date: Wed, 11 Dec 2019 22:51:21 +0000 Message-ID: <94479800C636CB44BD422CB454846E013CEA4464@SHSMSX101.ccr.corp.intel.com> References: <20191204141055.3647-1-rory.sexton@intel.com> <20191204141055.3647-2-rory.sexton@intel.com> In-Reply-To: <20191204141055.3647-2-rory.sexton@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiOWJiYmI3MzktYTA1NC00MTQ3LWIxYjYtMjk1NzkyZmExMzJjIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoieVdBN2hVOFwveExYQm1aaVhGK050bjhrcHE5cjlEMDVZd0pRbzBMbDFJRW5jNFFFT2NGa3BJbVdwcVhIZ2ZkTDUifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] net/i40e: Add new customized pctype for l2tpv3 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Sexton, Rory > Sent: Wednesday, December 4, 2019 6:11 AM > To: dev@dpdk.org > Cc: Zhang, Qi Z ; Xing, Beilei ; > Sexton, Rory ; adrien.mazarguil@6wind.com; Jagus, > DariuszX > Subject: [PATCH] net/i40e: Add new customized pctype for l2tpv3 It's not only add new customized pctype, but mainly enable FDIR for l2ipv3,= so how about " net/i40e: support FDIR for L2TPv3"? Detailed commit log is also needed. >=20 > Signed-off-by: Rory Sexton > Signed-off-by: Dariusz Jagus > --- > drivers/net/i40e/i40e_ethdev.c | 11 ++++++- > drivers/net/i40e/i40e_ethdev.h | 9 ++++++ > drivers/net/i40e/i40e_fdir.c | 34 +++++++++++++++++---- > drivers/net/i40e/i40e_flow.c | 55 > ++++++++++++++++++++++++++++++++++ > 4 files changed, 103 insertions(+), 6 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethde= v.c > index 5999c964b..80a46916c 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -12351,6 +12351,14 @@ i40e_update_customized_pctype(struct > rte_eth_dev *dev, uint8_t *pkg, > new_pctype =3D > i40e_find_customized_pctype(pf, > I40E_CUSTOMIZED_GTPU); > + else if (!strcmp(name, "IPV4_L2TPV3")) > + new_pctype =3D > + i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_IPV4_L2TPV3); > + else if (!strcmp(name, "IPV6_L2TPV3")) > + new_pctype =3D > + i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_IPV6_L2TPV3); > if (new_pctype) { > if (op =3D=3D RTE_PMD_I40E_PKG_OP_WR_ADD) { > new_pctype->pctype =3D pctype_value; > @@ -12544,7 +12552,8 @@ i40e_update_customized_ptype(struct > rte_eth_dev *dev, uint8_t *pkg, > RTE_PTYPE_TUNNEL_GRENAT; > in_tunnel =3D true; > } else if (!strncasecmp(name, "L2TPV2CTL", 9) || > - !strncasecmp(name, "L2TPV2", 6)) { > + !strncasecmp(name, "L2TPV2", 6) || > + !strncasecmp(name, "L2TPV3", 6)) { > ptype_mapping[i].sw_ptype |=3D > RTE_PTYPE_TUNNEL_L2TP; > in_tunnel =3D true; > diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethde= v.h > index 295ad593b..569a5a1e5 100644 > --- a/drivers/net/i40e/i40e_ethdev.h > +++ b/drivers/net/i40e/i40e_ethdev.h > @@ -508,6 +508,11 @@ struct i40e_raw_flow { > uint32_t length; > }; >=20 > +/* A structure used to define the input for L2TPv3 flow */ struct > +i40e_l2tpv3_flow { Seems missed struct rte_eth_ipv4_flow or struct rte_eth_ipv6_flow here? > + uint32_t session_id; /* Session ID in big endian. */ }; > + > /* > * A union contains the inputs for all types of flow > * items in flows need to be in big endian @@ -526,6 +531,7 @@ union > i40e_fdir_flow { > struct i40e_gtp_ipv4_flow gtp_ipv4_flow; > struct i40e_gtp_ipv6_flow gtp_ipv6_flow; > struct i40e_raw_flow raw_flow; > + struct i40e_l2tpv3_flow l2tpv3_flow; > }; >=20 > enum i40e_fdir_ip_type { > @@ -542,6 +548,7 @@ struct i40e_fdir_flow_ext { > uint16_t dst_id; /* VF ID, available when is_vf is 1*/ > bool inner_ip; /* If there is inner ip */ > enum i40e_fdir_ip_type iip_type; /* ip type for inner ip */ > + enum i40e_fdir_ip_type oip_type; /* ip type for outer ip */ > bool customized_pctype; /* If customized pctype is used */ > bool pkt_template; /* If raw packet template is used */ }; @@ -897,6 > +904,8 @@ enum i40e_new_pctype { > I40E_CUSTOMIZED_GTPU_IPV4, > I40E_CUSTOMIZED_GTPU_IPV6, > I40E_CUSTOMIZED_GTPU, > + I40E_CUSTOMIZED_IPV4_L2TPV3, > + I40E_CUSTOMIZED_IPV6_L2TPV3, > I40E_CUSTOMIZED_MAX, > }; >=20 > diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c = index > dee007daa..b18301eec 100644 > --- a/drivers/net/i40e/i40e_fdir.c > +++ b/drivers/net/i40e/i40e_fdir.c > @@ -33,6 +33,10 @@ > #define IPV6_ADDR_LEN 16 > #endif >=20 > +#ifndef IPPROTO_L2TP > +#define IPPROTO_L2TP 115 > +#endif > + > #define I40E_FDIR_PKT_LEN 512 > #define I40E_FDIR_IP_DEFAULT_LEN 420 > #define I40E_FDIR_IP_DEFAULT_TTL 0x40 > @@ -1026,7 +1030,12 @@ i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf > *pf, > pctype =3D=3D I40E_FILTER_PCTYPE_NONF_IPV4_SCTP || > pctype =3D=3D I40E_FILTER_PCTYPE_NONF_IPV4_OTHER || > pctype =3D=3D I40E_FILTER_PCTYPE_FRAG_IPV4 || > - is_customized_pctype) { > + ((is_customized_pctype) && > + ((cus_pctype->index =3D=3D I40E_CUSTOMIZED_GTPC) || > + (cus_pctype->index =3D=3D I40E_CUSTOMIZED_GTPU_IPV4) || > + (cus_pctype->index =3D=3D I40E_CUSTOMIZED_GTPU_IPV6) || > + (cus_pctype->index =3D=3D I40E_CUSTOMIZED_GTPU) || > + (cus_pctype->index =3D=3D I40E_CUSTOMIZED_IPV4_L2TPV3)))) { > ip =3D (struct rte_ipv4_hdr *)raw_pkt; >=20 > *ether_type =3D rte_cpu_to_be_16(RTE_ETHER_TYPE_IPV4); > @@ -1054,12 +1063,16 @@ i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf > *pf, > cus_pctype->index =3D=3D I40E_CUSTOMIZED_GTPU_IPV6 || > cus_pctype->index =3D=3D I40E_CUSTOMIZED_GTPU) > ip->next_proto_id =3D IPPROTO_UDP; > + else if (cus_pctype->index =3D=3D I40E_CUSTOMIZED_IPV4_L2TPV3) > + ip->next_proto_id =3D IPPROTO_L2TP; > len +=3D sizeof(struct rte_ipv4_hdr); > } else if (pctype =3D=3D I40E_FILTER_PCTYPE_NONF_IPV6_TCP || > pctype =3D=3D I40E_FILTER_PCTYPE_NONF_IPV6_UDP || > pctype =3D=3D I40E_FILTER_PCTYPE_NONF_IPV6_SCTP || > pctype =3D=3D I40E_FILTER_PCTYPE_NONF_IPV6_OTHER || > - pctype =3D=3D I40E_FILTER_PCTYPE_FRAG_IPV6) { > + pctype =3D=3D I40E_FILTER_PCTYPE_FRAG_IPV6 || > + ((is_customized_pctype) && > + (cus_pctype->index =3D=3D I40E_CUSTOMIZED_IPV6_L2TPV3))) { > ip6 =3D (struct rte_ipv6_hdr *)raw_pkt; >=20 > *ether_type =3D rte_cpu_to_be_16(RTE_ETHER_TYPE_IPV6); > @@ -1069,9 +1082,12 @@ i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf > *pf, > I40E_FDIR_IPv6_TC_OFFSET)); > ip6->payload_len =3D > rte_cpu_to_be_16(I40E_FDIR_IPv6_PAYLOAD_LEN); > - ip6->proto =3D fdir_input->flow.ipv6_flow.proto ? > - fdir_input->flow.ipv6_flow.proto : > - next_proto[fdir_input->pctype]; > + if (!is_customized_pctype) > + ip6->proto =3D fdir_input->flow.ipv6_flow.proto ? > + fdir_input->flow.ipv6_flow.proto : > + next_proto[fdir_input->pctype]; > + else if (cus_pctype->index =3D=3D I40E_CUSTOMIZED_IPV6_L2TPV3) > + ip6->proto =3D IPPROTO_L2TP; > ip6->hop_limits =3D fdir_input->flow.ipv6_flow.hop_limits ? > fdir_input->flow.ipv6_flow.hop_limits : > I40E_FDIR_IPv6_DEFAULT_HOP_LIMITS; > @@ -1115,6 +1131,7 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf, > struct rte_flow_item_gtp *gtp; > struct rte_ipv4_hdr *gtp_ipv4; > struct rte_ipv6_hdr *gtp_ipv6; > + struct rte_flow_item_l2tpv3 *l2tpv3; > uint8_t size, dst =3D 0; > uint8_t i, pit_idx, set_idx =3D I40E_FLXPLD_L4_IDX; /* use l4 by defaul= t*/ > int len; > @@ -1285,6 +1302,13 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf, > } else > payload =3D (unsigned char *)gtp + > sizeof(struct rte_flow_item_gtp); > + } else if (cus_pctype->index =3D=3D I40E_CUSTOMIZED_IPV4_L2TPV3 || > + cus_pctype->index =3D=3D I40E_CUSTOMIZED_IPV6_L2TPV3) { > + l2tpv3 =3D (struct rte_flow_item_l2tpv3 *)(raw_pkt + len); > + l2tpv3->session_id =3D > + fdir_input->flow.l2tpv3_flow.session_id; > + payload =3D (unsigned char *)l2tpv3 + > + sizeof(struct rte_flow_item_l2tpv3); > } > } else { > PMD_DRV_LOG(ERR, "unknown pctype %u.", diff --git > a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index > 61021037c..2a5d1d0b6 100644 > --- a/drivers/net/i40e/i40e_flow.c > +++ b/drivers/net/i40e/i40e_flow.c > @@ -1615,6 +1615,20 @@ static enum rte_flow_item_type pattern_qinq_1[] > =3D { > RTE_FLOW_ITEM_TYPE_END, > }; >=20 > +static enum rte_flow_item_type pattern_fdir_ipv4_l2tpv3[] =3D { > + RTE_FLOW_ITEM_TYPE_ETH, > + RTE_FLOW_ITEM_TYPE_IPV4, > + RTE_FLOW_ITEM_TYPE_L2TPV3, > + RTE_FLOW_ITEM_TYPE_END, > +}; > + > +static enum rte_flow_item_type pattern_fdir_ipv6_l2tpv3[] =3D { > + RTE_FLOW_ITEM_TYPE_ETH, > + RTE_FLOW_ITEM_TYPE_IPV6, > + RTE_FLOW_ITEM_TYPE_L2TPV3, > + RTE_FLOW_ITEM_TYPE_END, > +}; > + > static struct i40e_valid_pattern i40e_supported_patterns[] =3D { > /* Ethertype */ > { pattern_ethertype, i40e_flow_parse_ethertype_filter }, @@ -1795,6 > +1809,9 @@ static struct i40e_valid_pattern i40e_supported_patterns[] =3D= { > { pattern_fdir_ipv6_gtpu, i40e_flow_parse_gtp_filter }, > /* QINQ */ > { pattern_qinq_1, i40e_flow_parse_qinq_filter }, > + /* L2TPv3 */ > + { pattern_fdir_ipv4_l2tpv3, i40e_flow_parse_fdir_filter }, > + { pattern_fdir_ipv6_l2tpv3, i40e_flow_parse_fdir_filter }, > }; >=20 > #define NEXT_ITEM_OF_ACTION(act, actions, index) > \ > @@ -2420,6 +2437,15 @@ i40e_flow_fdir_get_pctype_value(struct i40e_pf > *pf, > cus_pctype =3D i40e_find_customized_pctype(pf, > I40E_CUSTOMIZED_GTPU_IPV6); > break; > + case RTE_FLOW_ITEM_TYPE_L2TPV3: > + if (filter->input.flow_ext.oip_type =3D=3D I40E_FDIR_IPTYPE_IPV4) > + cus_pctype =3D i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_IPV4_L2TPV3); > + else if (filter->input.flow_ext.oip_type =3D=3D > + I40E_FDIR_IPTYPE_IPV6) > + cus_pctype =3D i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_IPV6_L2TPV3); > + break; > default: > PMD_DRV_LOG(ERR, "Unsupported item type"); > break; > @@ -2461,6 +2487,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev > *dev, > const struct rte_flow_item_gtp *gtp_spec, *gtp_mask; > const struct rte_flow_item_raw *raw_spec, *raw_mask; > const struct rte_flow_item_vf *vf_spec; > + const struct rte_flow_item_l2tpv3 *l2tpv3_spec, *l2tpv3_mask; >=20 > uint8_t pctype =3D 0; > uint64_t input_set =3D I40E_INSET_NONE; > @@ -3012,6 +3039,34 @@ i40e_flow_parse_fdir_pattern(struct > rte_eth_dev *dev, > return -rte_errno; > } > break; > + case RTE_FLOW_ITEM_TYPE_L2TPV3: > + l2tpv3_spec =3D item->spec; > + l2tpv3_mask =3D item->mask; > + > + if (!l2tpv3_spec || !l2tpv3_mask) > + break; > + > + if (l2tpv3_mask->session_id !=3D UINT32_MAX) { > + rte_flow_error_set(error, EINVAL, > + RTE_FLOW_ERROR_TYPE_ITEM, > + item, > + "Invalid L2TPv3 mask"); > + return -rte_errno; > + } > + > + filter->input.flow.l2tpv3_flow.session_id =3D > + l2tpv3_spec->session_id; > + > + if (l3 =3D=3D RTE_FLOW_ITEM_TYPE_IPV4) > + filter->input.flow_ext.oip_type =3D > + I40E_FDIR_IPTYPE_IPV4; > + else if (l3 =3D=3D RTE_FLOW_ITEM_TYPE_IPV6) > + filter->input.flow_ext.oip_type =3D > + I40E_FDIR_IPTYPE_IPV6; > + > + filter->input.flow_ext.customized_pctype =3D true; > + cus_proto =3D item_type; > + break; > default: > break; > } > -- > 2.17.1