From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <ferruh.yigit@intel.com>
Received: from mga11.intel.com (mga11.intel.com [192.55.52.93])
 by dpdk.org (Postfix) with ESMTP id 8821658C5
 for <dev@dpdk.org>; Thu, 22 Sep 2016 18:54:18 +0200 (CEST)
Received: from fmsmga003.fm.intel.com ([10.253.24.29])
 by fmsmga102.fm.intel.com with ESMTP; 22 Sep 2016 09:54:18 -0700
X-ExtLoop1: 1
X-IronPort-AV: E=Sophos;i="5.30,379,1470726000"; d="scan'208";a="764518543"
Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.237.221.129])
 ([10.237.221.129])
 by FMSMGA003.fm.intel.com with ESMTP; 22 Sep 2016 09:54:16 -0700
From: Ferruh Yigit <ferruh.yigit@intel.com>
To: Zhang Qi <qi.z.zhang@intel.com>, jingjing.wu@intel.com,
 helin.zhang@intel.com
References: <1472155518-853-1-git-send-email-qi.z.zhang@intel.com>
 <1472155518-853-6-git-send-email-qi.z.zhang@intel.com>
Cc: dev@dpdk.org
Message-ID: <950bbea5-d228-0f45-d18e-2cd9cb8f73df@intel.com>
Date: Thu, 22 Sep 2016 17:54:15 +0100
User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:45.0) Gecko/20100101
 Thunderbird/45.3.0
MIME-Version: 1.0
In-Reply-To: <1472155518-853-6-git-send-email-qi.z.zhang@intel.com>
Content-Type: text/plain; charset=windows-1252
Content-Transfer-Encoding: 7bit
Subject: Re: [dpdk-dev] [PATCH 05/12] net/i40e/base: enable 25G get PHY
 abilities
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: patches and discussions about DPDK <dev.dpdk.org>
List-Unsubscribe: <http://dpdk.org/ml/options/dev>,
 <mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://dpdk.org/ml/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <http://dpdk.org/ml/listinfo/dev>,
 <mailto:dev-request@dpdk.org?subject=subscribe>
X-List-Received-Date: Thu, 22 Sep 2016 16:54:18 -0000

On 8/25/2016 9:05 PM, Zhang Qi wrote:
> Add extended PHY types to get PHY abilities command response struct
> for 25G, then put PHY types for 25g into the proper PHY_Type_Ext field.
> 
> Signed-off-by: Zhang Qi <qi.z.zhang@intel.com>
> ---
>  drivers/net/i40e/base/i40e_adminq_cmd.h | 15 +++++++++++++--
>  drivers/net/i40e/base/i40e_common.c     |  4 +++-
>  2 files changed, 16 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
> index 2831593..4ae4315 100644
> --- a/drivers/net/i40e/base/i40e_adminq_cmd.h
> +++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
> @@ -1733,7 +1733,13 @@ struct i40e_aq_get_phy_abilities_resp {
>  	__le32	eeer_val;
>  	u8	d3_lpan;
>  #define I40E_AQ_SET_PHY_D3_LPAN_ENA	0x01
> -	u8	reserved[3];
> +	u8	phy_type_ext;
> +#define I40E_AQ_PHY_TYPE_EXT_25G_KR	0X01
> +#define I40E_AQ_PHY_TYPE_EXT_25G_CR	0X02
> +#define I40E_AQ_PHY_TYPE_EXT_25G_SR	0x04
> +#define I40E_AQ_PHY_TYPE_EXT_25G_LR	0x08
> +	u8	mod_type_ext;
> +	u8	ext_comp_code;
>  	u8	phy_id[4];
>  	u8	module_type[3];
>  	u8	qualified_module_count;
> @@ -1755,7 +1761,12 @@ struct i40e_aq_set_phy_config { /* same bits as above in all */
>  	__le16	eee_capability;
>  	__le32	eeer;
>  	u8	low_power_ctrl;
> -	u8	reserved[3];
> +	u8	phy_type_ext;
> +#define I40E_AQ_PHY_TYPE_EXT_25G_KR	0X01
> +#define I40E_AQ_PHY_TYPE_EXT_25G_CR	0X02
> +#define I40E_AQ_PHY_TYPE_EXT_25G_SR	0x04
> +#define I40E_AQ_PHY_TYPE_EXT_25G_LR	0x08

These defines looks like duplicate.