From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F4101A0C4D; Thu, 17 Jun 2021 13:36:26 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AA5994067A; Thu, 17 Jun 2021 13:36:26 +0200 (CEST) Received: from proxy.6wind.com (host.78.145.23.62.rev.coltfrance.com [62.23.145.78]) by mails.dpdk.org (Postfix) with ESMTP id BF33E40150 for ; Thu, 17 Jun 2021 13:36:25 +0200 (CEST) Received: from localhost (unknown [10.16.0.39]) by proxy.6wind.com (Postfix) with ESMTP id 9ADE8A199D6; Thu, 17 Jun 2021 13:36:25 +0200 (CEST) From: Thierry Herbelot To: dev@dpdk.org Cc: Thierry Herbelot , Thomas Monjalon , Jerin Jacob , Ruifeng Wang , Honnappa Nagarahalli , =?UTF-8?q?Juraj=20Linke=C5=A1?= Date: Thu, 17 Jun 2021 13:36:13 +0200 Message-Id: <97534f70a781f5efeab1974c58c8afb7fbd3a2eb.1623929745.git.thierry.herbelot@6wind.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <876d348bb6ab493f404c2c1f288262ff3112cada.1623917721.git.thierry.herbelot@6wind.com> References: <876d348bb6ab493f404c2c1f288262ff3112cada.1623917721.git.thierry.herbelot@6wind.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH V4] config/arm: add Qualcomm Centriq 2400 part number X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 0xc00 is for "SoC 2.0" Qualcomm Centriq servers. 0x800 is for "SoC 1.1". Cc: Jerin Jacob Cc: Ruifeng Wang Cc: Honnappa Nagarahalli Cc: Juraj Linkeš Signed-off-by: Thierry Herbelot -- V2: add maintainers as Cc V3: fix meson syntax for the SoC v1.1 machine description V4: add new soc_centriq2400_v1_1 to the supported SoC list --- config/arm/meson.build | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index e83a56e0d589..8e3fa6969fad 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -179,7 +179,8 @@ implementer_qualcomm = { ['RTE_MAX_NUMA_NODES', 1] ], 'part_number_config': { - '0xc00': {'machine_args': ['-march=armv8-a+crc']} + '0x800': {'machine_args': ['-march=armv8-a+crc']}, + '0xc00': {'machine_args': ['-march=armv8-a+crc']}, } } @@ -223,8 +224,15 @@ soc_bluefield = { 'numa': false } +soc_centriq2400_v1_1 = { + 'description': 'Qualcomm Centriq 2400 (SoC v1.1)', + 'implementer': '0x51', + 'part_number': '0x800', + 'numa': false +} + soc_centriq2400 = { - 'description': 'Qualcomm Centriq 2400', + 'description': 'Qualcomm Centriq 2400 (SoC v2.0)', 'implementer': '0x51', 'part_number': '0xc00', 'numa': false @@ -333,7 +341,8 @@ Start of SoCs list generic: Generic un-optimized build for all aarch64 machines. armada: Marvell ARMADA bluefield: NVIDIA BlueField -centriq2400: Qualcomm Centriq 2400 +soc_centriq2400_v1_1: Qualcomm Centriq 2400 (SoC v1.1) +centriq2400: Qualcomm Centriq 2400 (SoC v2.0) cn10k: Marvell OCTEON 10 dpaa: NXP DPAA emag: Ampere eMAG @@ -354,6 +363,7 @@ socs = { 'generic': soc_generic, 'armada': soc_armada, 'bluefield': soc_bluefield, + 'soc_centriq2400_v1_1': soc_centriq2400_v1_1, 'centriq2400': soc_centriq2400, 'cn10k' : soc_cn10k, 'dpaa': soc_dpaa, -- 2.29.2