From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B3731A0508; Tue, 29 Mar 2022 19:13:53 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 618F940691; Tue, 29 Mar 2022 19:13:53 +0200 (CEST) Received: from smartserver.smartsharesystems.com (smartserver.smartsharesystems.com [77.243.40.215]) by mails.dpdk.org (Postfix) with ESMTP id CB66A40141 for ; Tue, 29 Mar 2022 19:13:51 +0200 (CEST) X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Subject: RE: OVS DPDK DMA-Dev library/Design Discussion Date: Tue, 29 Mar 2022 19:13:45 +0200 Message-ID: <98CBD80474FA8B44BF855DF32C47DC35D86F80@smartserver.smartshare.dk> In-Reply-To: X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: OVS DPDK DMA-Dev library/Design Discussion Thread-Index: AdhDjwILQTyhyMZZSjCKbFrkd4SQtgAALXNA References: <98CBD80474FA8B44BF855DF32C47DC35D86F7C@smartserver.smartshare.dk> <98CBD80474FA8B44BF855DF32C47DC35D86F7D@smartserver.smartshare.dk> <7968dd0b-8647-8d7b-786f-dc876bcbf3f0@redhat.com> <98CBD80474FA8B44BF855DF32C47DC35D86F7E@smartserver.smartshare.dk> From: =?iso-8859-1?Q?Morten_Br=F8rup?= To: "Bruce Richardson" Cc: "Maxime Coquelin" , "Van Haaren, Harry" , "Pai G, Sunil" , "Stokes, Ian" , "Hu, Jiayu" , "Ferriter, Cian" , "Ilya Maximets" , , , "Mcnamara, John" , "O'Driscoll, Tim" , "Finn, Emma" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > From: Bruce Richardson [mailto:bruce.richardson@intel.com] > Sent: Tuesday, 29 March 2022 19.03 >=20 > On Tue, Mar 29, 2022 at 06:45:19PM +0200, Morten Br=F8rup wrote: > > > From: Maxime Coquelin [mailto:maxime.coquelin@redhat.com] > > > Sent: Tuesday, 29 March 2022 18.24 > > > > > > Hi Morten, > > > > > > On 3/29/22 16:44, Morten Br=F8rup wrote: > > > >> From: Van Haaren, Harry [mailto:harry.van.haaren@intel.com] > > > >> Sent: Tuesday, 29 March 2022 15.02 > > > >> > > > >>> From: Morten Br=F8rup > > > >>> Sent: Tuesday, March 29, 2022 1:51 PM > > > >>> > > > >>> Having thought more about it, I think that a completely > different > > > architectural approach is required: > > > >>> > > > >>> Many of the DPDK Ethernet PMDs implement a variety of RX and = TX > > > packet burst functions, each optimized for different CPU vector > > > instruction sets. The availability of a DMA engine should be > treated > > > the same way. So I suggest that PMDs copying packet contents, e.g. > > > memif, pcap, vmxnet3, should implement DMA optimized RX and TX > packet > > > burst functions. > > > >>> > > > >>> Similarly for the DPDK vhost library. > > > >>> > > > >>> In such an architecture, it would be the application's job to > > > allocate DMA channels and assign them to the specific PMDs that > should > > > use them. But the actual use of the DMA channels would move down > below > > > the application and into the DPDK PMDs and libraries. > > > >>> > > > >>> > > > >>> Med venlig hilsen / Kind regards, > > > >>> -Morten Br=F8rup > > > >> > > > >> Hi Morten, > > > >> > > > >> That's *exactly* how this architecture is designed & > implemented. > > > >> 1. The DMA configuration and initialization is up to the > application > > > (OVS). > > > >> 2. The VHost library is passed the DMA-dev ID, and its new > async > > > rx/tx APIs, and uses the DMA device to accelerate the copy. > > > >> > > > >> Looking forward to talking on the call that just started. > Regards, - > > > Harry > > > >> > > > > > > > > OK, thanks - as I said on the call, I haven't looked at the > patches. > > > > > > > > Then, I suppose that the TX completions can be handled in the TX > > > function, and the RX completions can be handled in the RX = function, > > > just like the Ethdev PMDs handle packet descriptors: > > > > > > > > TX_Burst(tx_packet_array): > > > > 1. Clean up descriptors processed by the NIC chip. --> Process > TX > > > DMA channel completions. (Effectively, the 2nd pipeline stage.) > > > > 2. Pass on the tx_packet_array to the NIC chip descriptors. -- > > Pass > > > on the tx_packet_array to the TX DMA channel. (Effectively, the = 1st > > > pipeline stage.) > > > > > > The problem is Tx function might not be called again, so enqueued > > > packets in 2. may never be completed from a Virtio point of view. > IOW, > > > the packets will be copied to the Virtio descriptors buffers, but > the > > > descriptors will not be made available to the Virtio driver. > > > > In that case, the application needs to call TX_Burst() periodically > with an empty array, for completion purposes. > > > > Or some sort of TX_Keepalive() function can be added to the DPDK > library, to handle DMA completion. It might even handle multiple DMA > channels, if convenient - and if possible without locking or other > weird complexity. > > > > Here is another idea, inspired by a presentation at one of the DPDK > Userspace conferences. It may be wishful thinking, though: > > > > Add an additional transaction to each DMA burst; a special > transaction containing the memory write operation that makes the > descriptors available to the Virtio driver. > > >=20 > That is something that can work, so long as the receiver is operating > in > polling mode. For cases where virtio interrupts are enabled, you still > need > to do a write to the eventfd in the kernel in vhost to signal the > virtio > side. That's not something that can be offloaded to a DMA engine, > sadly, so > we still need some form of completion call. I guess that virtio interrupts is the most widely deployed scenario, so = let's ignore the DMA TX completion transaction for now - and call it a = possible future optimization for specific use cases. So it seems that = some form of completion call is unavoidable.