From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D10764401D; Mon, 13 May 2024 20:59:22 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AC434402E4; Mon, 13 May 2024 20:59:22 +0200 (CEST) Received: from dkmailrelay1.smartsharesystems.com (smartserver.smartsharesystems.com [77.243.40.215]) by mails.dpdk.org (Postfix) with ESMTP id 8ED8D402CD for ; Mon, 13 May 2024 20:59:21 +0200 (CEST) Received: from smartserver.smartsharesystems.com (smartserver.smartsharesys.local [192.168.4.10]) by dkmailrelay1.smartsharesystems.com (Postfix) with ESMTP id 5230B2275F; Mon, 13 May 2024 20:59:21 +0200 (CEST) Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Subject: RE: [PATCH v5 31/45] baseband/acc: use rte stdatomic API X-MimeOLE: Produced By Microsoft Exchange V6.5 Date: Mon, 13 May 2024 20:59:17 +0200 Message-ID: <98CBD80474FA8B44BF855DF32C47DC35E9F448@smartserver.smartshare.dk> In-Reply-To: X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: [PATCH v5 31/45] baseband/acc: use rte stdatomic API Thread-Index: AQHan98O9+9QGg6ilkCIPbiM/aXLcrGVgcBAgAAM2UA= References: <1710967892-7046-1-git-send-email-roretzla@linux.microsoft.com> <1715018306-13741-1-git-send-email-roretzla@linux.microsoft.com> <1715018306-13741-32-git-send-email-roretzla@linux.microsoft.com> From: =?iso-8859-1?Q?Morten_Br=F8rup?= To: "Chautru, Nicolas" , "Tyler Retzlaff" , Cc: =?iso-8859-1?Q?Mattias_R=F6nnblom?= , "Sevincer, Abdullah" , "Ajit Khaparde" , "Alok Prasad" , "Burakov, Anatoly" , "Andrew Rybchenko" , "Anoob Joseph" , "Richardson, Bruce" , "Marohn, Byron" , "Chenbo Xia" , "Chengwen Feng" , "Loftus, Ciara" , "Power, Ciara" , "Dariusz Sosnowski" , "Hunt, David" , "Devendra Singh Rawat" , "Carrillo, Erik G" , "Guoyang Zhou" , "Harman Kalra" , "Van Haaren, Harry" , "Nagarahalli, Honnappa" , "Jakub Grajciar" , "Jerin Jacob" , "Jeroen de Borst" , "Jian Wang" , "Jiawen Wu" , "Jie Hai" , "Wu, Jingjing" , "Joshua Washington" , "Joyce Kong" , "Guo, Junfeng" , "Laatz, Kevin" , "Konstantin Ananyev" , "Liang Ma" , "Long Li" , "Maciej Czekaj" , "Matan Azrad" , "Maxime Coquelin" , "Ori Kam" , "Pavan Nikhilesh" , "Mccarthy, Peter" , "Rahul Lakkireddy" , "Pattan, Reshma" , "Xu, Rosen" , "Ruifeng Wang" , "Rushil Gupta" , "Gobriel, Sameh" , "Sivaprasad Tummala" , "Somnath Kotur" , "Stephen Hemminger" , "Suanming Mou" , "Sunil Kumar Kori" , "Sunil Uttarwar" , "Tetsuya Mukawa" , "Vamsi Attunuru" , "Viacheslav Ovsiienko" , "Medvedkin, Vladimir" , "Xiaoyun Wang" , "Wang, Yipeng1" , "Yisen Zhuang" , "Ziyang Xuan" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Tyler, it looks like the line continuations in = /drivers/baseband/acc/rte_vrb_pmd.c are indented with four spaces = instead of double . Med venlig hilsen / Kind regards, -Morten Br=F8rup > From: Chautru, Nicolas [mailto:nicolas.chautru@intel.com] > Sent: Monday, 13 May 2024 20.13 >=20 > Hi Tyler, >=20 > Still some issues with indentation when the sed is causing split = across > 2 lines. > Please fix indentation, nack like that. >=20 > Thanks > Nic >=20 > > From: Tyler Retzlaff > > Sent: Monday, May 6, 2024 10:58 AM > > > > Replace the use of gcc builtin __atomic_xxx intrinsics with > corresponding > > rte_atomic_xxx optional rte stdatomic API. > > > > Signed-off-by: Tyler Retzlaff > > Acked-by: Stephen Hemminger > > --- > > drivers/baseband/acc/rte_acc100_pmd.c | 36 = +++++++++++++------------- > - > > drivers/baseband/acc/rte_vrb_pmd.c | 46 = +++++++++++++++++++++++--- > -- > > ------- > > 2 files changed, 48 insertions(+), 34 deletions(-) > > > > diff --git a/drivers/baseband/acc/rte_acc100_pmd.c > > b/drivers/baseband/acc/rte_acc100_pmd.c > > index 4f666e5..ee50b9c 100644 > > --- a/drivers/baseband/acc/rte_acc100_pmd.c > > +++ b/drivers/baseband/acc/rte_acc100_pmd.c > > @@ -3673,8 +3673,8 @@ > > > > desc_idx =3D acc_desc_idx_tail(q, *dequeued_descs); > > desc =3D q->ring_addr + desc_idx; > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > - __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > > > /* Check fdone bit */ > > if (!(atom_desc.rsp.val & ACC_FDONE)) > > @@ -3728,8 +3728,8 @@ > > uint16_t current_dequeued_descs =3D 0, descs_in_tb; > > > > desc =3D acc_desc_tail(q, *dequeued_descs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > - __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > > > /* Check fdone bit */ > > if (!(atom_desc.rsp.val & ACC_FDONE)) > > @@ -3742,8 +3742,8 @@ > > /* Check if last CB in TB is ready to dequeue (and thus > > * the whole TB) - checking sdone bit. If not return. > > */ > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)last_desc, > > - __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)last_desc, > > + rte_memory_order_relaxed); > > if (!(atom_desc.rsp.val & ACC_SDONE)) > > return -1; > > > > @@ -3755,8 +3755,8 @@ > > > > while (i < descs_in_tb) { > > desc =3D acc_desc_tail(q, *dequeued_descs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > - __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > rsp.val =3D atom_desc.rsp.val; > > rte_bbdev_log_debug("Resp. desc %p: %x descs %d cbs > > %d\n", > > desc, rsp.val, descs_in_tb, desc- > > >req.numCBs); @@ -3793,8 +3793,8 @@ > > struct rte_bbdev_dec_op *op; > > > > desc =3D acc_desc_tail(q, dequeued_cbs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > - __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > > > /* Check fdone bit */ > > if (!(atom_desc.rsp.val & ACC_FDONE)) > > @@ -3846,8 +3846,8 @@ > > struct rte_bbdev_dec_op *op; > > > > desc =3D acc_desc_tail(q, dequeued_cbs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > - __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > > > /* Check fdone bit */ > > if (!(atom_desc.rsp.val & ACC_FDONE)) > > @@ -3902,8 +3902,8 @@ > > uint8_t cbs_in_tb =3D 1, cb_idx =3D 0; > > > > desc =3D acc_desc_tail(q, dequeued_cbs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > - __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > > > /* Check fdone bit */ > > if (!(atom_desc.rsp.val & ACC_FDONE)) > > @@ -3919,8 +3919,8 @@ > > /* Check if last CB in TB is ready to dequeue (and thus > > * the whole TB) - checking sdone bit. If not return. > > */ > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)last_desc, > > - __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)last_desc, > > + rte_memory_order_relaxed); > > if (!(atom_desc.rsp.val & ACC_SDONE)) > > return -1; > > > > @@ -3930,8 +3930,8 @@ > > /* Read remaining CBs if exists */ > > while (cb_idx < cbs_in_tb) { > > desc =3D acc_desc_tail(q, dequeued_cbs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > - __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > rsp.val =3D atom_desc.rsp.val; > > rte_bbdev_log_debug("Resp. desc %p: %x r %d c %d\n", > > desc, rsp.val, cb_idx, > > cbs_in_tb); diff --git a/drivers/baseband/acc/rte_vrb_pmd.c > > b/drivers/baseband/acc/rte_vrb_pmd.c > > index 88b1104..f7c54be 100644 > > --- a/drivers/baseband/acc/rte_vrb_pmd.c > > +++ b/drivers/baseband/acc/rte_vrb_pmd.c > > @@ -3119,7 +3119,8 @@ > > > > desc_idx =3D acc_desc_idx_tail(q, *dequeued_descs); > > desc =3D q->ring_addr + desc_idx; > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > > > if (*dequeued_ops + desc->req.numCBs > max_requested_ops) > > return -1; > > @@ -3157,7 +3158,8 @@ > > struct rte_bbdev_enc_op *op; > > > > desc =3D acc_desc_tail(q, *dequeued_descs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > > > /* Check fdone bit. */ > > if (!(atom_desc.rsp.val & ACC_FDONE)) > > @@ -3192,7 +3194,8 @@ > > uint16_t current_dequeued_descs =3D 0, descs_in_tb; > > > > desc =3D acc_desc_tail(q, *dequeued_descs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > > > if (*dequeued_ops + 1 > max_requested_ops) > > return -1; > > @@ -3208,7 +3211,8 @@ > > /* Check if last CB in TB is ready to dequeue (and thus > > * the whole TB) - checking sdone bit. If not return. > > */ > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)last_desc, > > __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)last_desc, > > + rte_memory_order_relaxed); > > if (!(atom_desc.rsp.val & ACC_SDONE)) > > return -1; > > > > @@ -3220,7 +3224,8 @@ > > > > while (i < descs_in_tb) { > > desc =3D acc_desc_tail(q, *dequeued_descs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > rsp.val =3D atom_desc.rsp.val; > > > > vrb_update_dequeued_operation(desc, rsp, &op->status, > > aq_dequeued, true, false); @@ -3246,7 +3251,8 @@ > > struct rte_bbdev_dec_op *op; > > > > desc =3D acc_desc_tail(q, dequeued_cbs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > > > /* Check fdone bit. */ > > if (!(atom_desc.rsp.val & ACC_FDONE)) > > @@ -3290,7 +3296,8 @@ > > struct rte_bbdev_dec_op *op; > > > > desc =3D acc_desc_tail(q, dequeued_cbs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > > > /* Check fdone bit. */ > > if (!(atom_desc.rsp.val & ACC_FDONE)) > > @@ -3346,7 +3353,8 @@ > > uint32_t tb_crc_check =3D 0; > > > > desc =3D acc_desc_tail(q, dequeued_cbs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > > > /* Check fdone bit. */ > > if (!(atom_desc.rsp.val & ACC_FDONE)) > > @@ -3362,7 +3370,8 @@ > > /* Check if last CB in TB is ready to dequeue (and thus the whole > TB) - > > checking sdone bit. > > * If not return. > > */ > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)last_desc, > > __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)last_desc, > > + rte_memory_order_relaxed); > > if (!(atom_desc.rsp.val & ACC_SDONE)) > > return -1; > > > > @@ -3372,7 +3381,8 @@ > > /* Read remaining CBs if exists. */ > > while (cb_idx < cbs_in_tb) { > > desc =3D acc_desc_tail(q, dequeued_cbs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > rsp.val =3D atom_desc.rsp.val; > > rte_bbdev_log_debug("Resp. desc %p: %x %x %x", desc, > > rsp.val, desc->rsp.add_info_0, > > @@ -3790,7 +3800,8 @@ > > struct rte_bbdev_fft_op *op; > > > > desc =3D acc_desc_tail(q, dequeued_cbs); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > > > /* Check fdone bit */ > > if (!(atom_desc.rsp.val & ACC_FDONE)) > > @@ -4116,7 +4127,8 @@ > > uint8_t descs_in_op, i; > > > > desc =3D acc_desc_tail(q, dequeued_ops); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > > > /* Check fdone bit. */ > > if (!(atom_desc.rsp.val & ACC_FDONE)) > > @@ -4127,7 +4139,8 @@ > > /* Get last CB. */ > > last_desc =3D acc_desc_tail(q, dequeued_ops + descs_in_op - > > 1); > > /* Check if last op is ready to dequeue by checking fdone > bit. > > If not exit. */ > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t > > *)last_desc, __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)last_desc, > > + rte_memory_order_relaxed); > > if (!(atom_desc.rsp.val & ACC_FDONE)) > > return -1; > > #ifdef RTE_LIBRTE_BBDEV_DEBUG > > @@ -4137,8 +4150,8 @@ > > for (i =3D 1; i < descs_in_op - 1; i++) { > > last_desc =3D q->ring_addr + ((q->sw_ring_tail + > > dequeued_ops + i) > > & q->sw_ring_wrap_mask); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t > > *)last_desc, > > - __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit( > > + (uint64_t __rte_atomic *)last_desc, > > rte_memory_order_relaxed); > > if (!(atom_desc.rsp.val & ACC_FDONE)) > > return -1; > > } > > @@ -4154,7 +4167,8 @@ > > > > for (i =3D 0; i < descs_in_op; i++) { > > desc =3D q->ring_addr + ((q->sw_ring_tail + dequeued_ops + i) > > & q->sw_ring_wrap_mask); > > - atom_desc.atom_hdr =3D __atomic_load_n((uint64_t *)desc, > > __ATOMIC_RELAXED); > > + atom_desc.atom_hdr =3D rte_atomic_load_explicit((uint64_t > > __rte_atomic *)desc, > > + rte_memory_order_relaxed); > > rsp.val =3D atom_desc.rsp.val; > > > > vrb_update_dequeued_operation(desc, rsp, &op->status, > > aq_dequeued, true, false); > > -- > > 1.8.3.1