RE: [PATCH v1 4/4] config/x86: enable RTE_USE_C11_MEM_MODEL by default

["Morten Brørup" <mb@smartsharesystems.com>]

> From: Konstantin Ananyev [mailto:konstantin.ananyev@huawei.com]
> Sent: Wednesday, 21 May 2025 13.15
> 
> As an attempt to reduce legacy code usage within rte_ring -
> enable RTE_USE_C11_MEM_MODEL by default on all x86 platforms.

I theory, after requiring C11, RTE_USE_C11_MEM_MODEL should be the default on all platforms, and the legacy memory model should be optional for performance.

But IIRC, significant performance differences made the legacy memory model better for some platforms, so keeping legacy the default for those platforms makes sense.

If this patch series solved the C11 performance issues on those other platforms, we can get rid of the ring operations using the legacy memory model. Such a change would be suitable for an LTS release.

That said, we could postpone this patch 4 to the 25.11 release.
In theory, patch 3 replaced a rte_atomic_thread_fence() - affecting all memory operations - with some atomic functions affecting only the ring head/tail memory operations.
However, if that theoretical change is 100 % irrelevant on any x86 CPU in reality, then it's acceptable to not wait for 25.11.

> 
> Signed-off-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
> ---
>  config/x86/meson.build | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/config/x86/meson.build b/config/x86/meson.build
> index c3564b0011..5528eb4960 100644
> --- a/config/x86/meson.build
> +++ b/config/x86/meson.build
> @@ -21,6 +21,7 @@ endif
> 
>  dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
>  dpdk_conf.set('RTE_MAX_LCORE', 128)
> +dpdk_conf.set('RTE_USE_C11_MEM_MODEL', true)
> 
>  epyc_zen_cores = {
>      '__znver5__':768,
> --
> 2.43.0