From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 64AEAA0527; Mon, 20 Jul 2020 18:58:20 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BFE7C2B86; Mon, 20 Jul 2020 18:58:18 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id C024F1150 for ; Mon, 20 Jul 2020 18:58:17 +0200 (CEST) IronPort-SDR: ay7kdkvB//QaWFngnhT2uyoy0GCJFQ1qMiSvIe0CL8aW4o014VdLzQT0FKiRxObfjAWfRvKBAJ IvYTN/SXzjCA== X-IronPort-AV: E=McAfee;i="6000,8403,9688"; a="137445630" X-IronPort-AV: E=Sophos;i="5.75,375,1589266800"; d="scan'208";a="137445630" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jul 2020 09:58:16 -0700 IronPort-SDR: SNUsBgVQPmijQB0mhyNVrRJzcj5Q90RzvcwrAVQC2mR0GdG8FgnVDGamiGwmqisuPaHR78RIBS HfiZFPRcSRuw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,375,1589266800"; d="scan'208";a="392088799" Received: from fyigit-mobl.ger.corp.intel.com (HELO [10.213.251.110]) ([10.213.251.110]) by fmsmga001.fm.intel.com with ESMTP; 20 Jul 2020 09:58:14 -0700 To: Thomas Monjalon , Parav Pandit Cc: dev@dpdk.org, grive@u256.net, rasland@mellanox.com, orika@mellanox.com, matan@mellanox.com, joyce.kong@arm.com, David Marchand References: <20200610171728.89-2-parav@mellanox.com> <20200717134924.922390-3-parav@mellanox.com> <2791231.CMBUAsGlKG@thomas> From: Ferruh Yigit Autocrypt: addr=ferruh.yigit@intel.com; prefer-encrypt=mutual; keydata= mQINBFXZCFABEADCujshBOAaqPZpwShdkzkyGpJ15lmxiSr3jVMqOtQS/sB3FYLT0/d3+bvy qbL9YnlbPyRvZfnP3pXiKwkRoR1RJwEo2BOf6hxdzTmLRtGtwWzI9MwrUPj6n/ldiD58VAGQ +iR1I/z9UBUN/ZMksElA2D7Jgg7vZ78iKwNnd+vLBD6I61kVrZ45Vjo3r+pPOByUBXOUlxp9 GWEKKIrJ4eogqkVNSixN16VYK7xR+5OUkBYUO+sE6etSxCr7BahMPKxH+XPlZZjKrxciaWQb +dElz3Ab4Opl+ZT/bK2huX+W+NJBEBVzjTkhjSTjcyRdxvS1gwWRuXqAml/sh+KQjPV1PPHF YK5LcqLkle+OKTCa82OvUb7cr+ALxATIZXQkgmn+zFT8UzSS3aiBBohg3BtbTIWy51jNlYdy ezUZ4UxKSsFuUTPt+JjHQBvF7WKbmNGS3fCid5Iag4tWOfZoqiCNzxApkVugltxoc6rG2TyX CmI2rP0mQ0GOsGXA3+3c1MCdQFzdIn/5tLBZyKy4F54UFo35eOX8/g7OaE+xrgY/4bZjpxC1 1pd66AAtKb3aNXpHvIfkVV6NYloo52H+FUE5ZDPNCGD0/btFGPWmWRmkPybzColTy7fmPaGz cBcEEqHK4T0aY4UJmE7Ylvg255Kz7s6wGZe6IR3N0cKNv++O7QARAQABtCVGZXJydWggWWln aXQgPGZlcnJ1aC55aWdpdEBpbnRlbC5jb20+iQJsBBMBCgBWAhsDAh4BAheABQsJCAcDBRUK CQgLBRYCAwEABQkKqZZ8FiEE0jZTh0IuwoTjmYHH+TPrQ98TYR8FAl6ha3sXGHZrczovL2tl eXMub3BlbnBncC5vcmcACgkQ+TPrQ98TYR8uLA//QwltuFliUWe60xwmu9sY38c1DXvX67wk UryQ1WijVdIoj4H8cf/s2KtyIBjc89R254KMEfJDao/LrXqJ69KyGKXFhFPlF3VmFLsN4XiT PSfxkx8s6kHVaB3O183p4xAqnnl/ql8nJ5ph9HuwdL8CyO5/7dC/MjZ/mc4NGq5O9zk3YRGO lvdZAp5HW9VKW4iynvy7rl3tKyEqaAE62MbGyfJDH3C/nV/4+mPc8Av5rRH2hV+DBQourwuC ci6noiDP6GCNQqTh1FHYvXaN4GPMHD9DX6LtT8Fc5mL/V9i9kEVikPohlI0WJqhE+vQHFzR2 1q5nznE+pweYsBi3LXIMYpmha9oJh03dJOdKAEhkfBr6n8BWkWQMMiwfdzg20JX0o7a/iF8H 4dshBs+dXdIKzPfJhMjHxLDFNPNH8zRQkB02JceY9ESEah3wAbzTwz+e/9qQ5OyDTQjKkVOo cxC2U7CqeNt0JZi0tmuzIWrfxjAUulVhBmnceqyMOzGpSCQIkvalb6+eXsC9V1DZ4zsHZ2Mx Hi+7pCksdraXUhKdg5bOVCt8XFmx1MX4AoV3GWy6mZ4eMMvJN2hjXcrreQgG25BdCdcxKgqp e9cMbCtF+RZax8U6LkAWueJJ1QXrav1Jk5SnG8/5xANQoBQKGz+yFiWcgEs9Tpxth15o2v59 gXK5Ag0EV9ZMvgEQAKc0Db17xNqtSwEvmfp4tkddwW9XA0tWWKtY4KUdd/jijYqc3fDD54ES YpV8QWj0xK4YM0dLxnDU2IYxjEshSB1TqAatVWz9WtBYvzalsyTqMKP3w34FciuL7orXP4Ai bPtrHuIXWQOBECcVZTTOdZYGAzaYzxiAONzF9eTiwIqe9/oaOjTwTLnOarHt16QApTYQSnxD UQljeNvKYt1lZE/gAUUxNLWsYyTT+22/vU0GDUahsJxs1+f1yEr+OGrFiEAmqrzpF0lCS3f/ 3HVTU6rS9cK3glVUeaTF4+1SK5ZNO35piVQCwphmxa+dwTG/DvvHYCtgOZorTJ+OHfvCnSVj sM4kcXGjJPy3JZmUtyL9UxEbYlrffGPQI3gLXIGD5AN5XdAXFCjjaID/KR1c9RHd7Oaw0Pdc q9UtMLgM1vdX8RlDuMGPrj5sQrRVbgYHfVU/TQCk1C9KhzOwg4Ap2T3tE1umY/DqrXQgsgH7 1PXFucVjOyHMYXXugLT8YQ0gcBPHy9mZqw5mgOI5lCl6d4uCcUT0l/OEtPG/rA1lxz8ctdFB VOQOxCvwRG2QCgcJ/UTn5vlivul+cThi6ERPvjqjblLncQtRg8izj2qgmwQkvfj+h7Ex88bI 8iWtu5+I3K3LmNz/UxHBSWEmUnkg4fJlRr7oItHsZ0ia6wWQ8lQnABEBAAGJAjwEGAEKACYC GwwWIQTSNlOHQi7ChOOZgcf5M+tD3xNhHwUCXqFrngUJCKxSYAAKCRD5M+tD3xNhH3YWD/9b cUiWaHJasX+OpiuZ1Li5GG3m9aw4lR/k2lET0UPRer2Jy1JsL+uqzdkxGvPqzFTBXgx/6Byz EMa2mt6R9BCyR286s3lxVS5Bgr5JGB3EkpPcoJT3A7QOYMV95jBiiJTy78Qdzi5LrIu4tW6H o0MWUjpjdbR01cnj6EagKrDx9kAsqQTfvz4ff5JIFyKSKEHQMaz1YGHyCWhsTwqONhs0G7V2 0taQS1bGiaWND0dIBJ/u0pU998XZhmMzn765H+/MqXsyDXwoHv1rcaX/kcZIcN3sLUVcbdxA WHXOktGTQemQfEpCNuf2jeeJlp8sHmAQmV3dLS1R49h0q7hH4qOPEIvXjQebJGs5W7s2vxbA 5u5nLujmMkkfg1XHsds0u7Zdp2n200VC4GQf8vsUp6CSMgjedHeF9zKv1W4lYXpHp576ZV7T GgsEsvveAE1xvHnpV9d7ZehPuZfYlP4qgo2iutA1c0AXZLn5LPcDBgZ+KQZTzm05RU1gkx7n gL9CdTzVrYFy7Y5R+TrE9HFUnsaXaGsJwOB/emByGPQEKrupz8CZFi9pkqPuAPwjN6Wonokv ChAewHXPUadcJmCTj78Oeg9uXR6yjpxyFjx3vdijQIYgi5TEGpeTQBymLANOYxYWYOjXk+ae dYuOYKR9nbPv+2zK9pwwQ2NXbUBystaGyQ== Message-ID: <99c7373e-1e4f-2823-764d-15c60535828a@intel.com> Date: Mon, 20 Jul 2020 17:58:13 +0100 MIME-Version: 1.0 In-Reply-To: <2791231.CMBUAsGlKG@thomas> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v7 2/9] eal: introduce RTE common initialization level X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 7/20/2020 5:48 PM, Thomas Monjalon wrote: > 20/07/2020 18:21, Ferruh Yigit: >> On 7/17/2020 2:49 PM, Parav Pandit wrote: >>> Currently mlx5_common uses CLASS priority to initialize >>> common code before initializing the PMD. >>> However mlx5_common is not really a class, it is the pre-initialization >>> code needed for the PMDs. >>> >>> In subsequent patch a needed initialization sequence is: >>> (a) Initialize bus (say pci) >>> (b) Initialize common code of a driver (mlx5_common) >>> (c) Register mlx5 class PMDs (mlx5 net, mlx5 vdpa) >>> Information registered by these PMDs is used by mlx5_bus_pci PMD. >>> This mlx5 class PMDs should not confused with rte_class. >>> (d) Register mlx5 PCI bus PMD >>> >>> Hence, introduce a new RTE priority level RTE_PRIO_COMMON which >>> can be used for common initialization and RTE_PRIO_CLASS by mlx5 PMDs >>> for class driver initialization. >>> >>> Signed-off-by: Parav Pandit >>> Acked-by: Matan Azrad >>> --- >>> Changelog: >>> v2->v3: >>> - new patch >>> --- >>> lib/librte_eal/include/rte_common.h | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/lib/librte_eal/include/rte_common.h b/lib/librte_eal/include/rte_common.h >>> index 8f487a563..522afe58e 100644 >>> --- a/lib/librte_eal/include/rte_common.h >>> +++ b/lib/librte_eal/include/rte_common.h >>> @@ -135,6 +135,7 @@ typedef uint16_t unaligned_uint16_t; >>> >>> #define RTE_PRIORITY_LOG 101 >>> #define RTE_PRIORITY_BUS 110 >>> +#define RTE_PRIORITY_COMMON 119 >>> #define RTE_PRIORITY_CLASS 120 >>> #define RTE_PRIORITY_LAST 65535 >>> >>> >> >> I guess the name "common" selected because of the intention to use it by the >> common piece of the driver, but only from eal perspective the name >> "PRIORITY_COMMON" looks so vague, it doesn't describe any purpose. > > You're right. > >> Also the value doesn't leave any gap between the class priority, what else can >> be needed in the future in between, right? > > And we can imagine a bus requiring a common lib > to be initialized before. > >> @Thomas, @David, I am reluctant to get this eal change through the next-net, can >> you please review/ack it first? > > What about skipping this patch and using "RTE_PRIORITY_CLASS - 1" > in the code? > For now I think it is OK, in the future if more priority dependency involved we can define the macro.