From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 193EF282 for ; Tue, 7 Feb 2017 16:46:00 +0100 (CET) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP; 07 Feb 2017 07:45:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,346,1477983600"; d="scan'208";a="62208011" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga005.fm.intel.com with ESMTP; 07 Feb 2017 07:45:59 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.248.2; Tue, 7 Feb 2017 07:45:59 -0800 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.20]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.132]) with mapi id 14.03.0248.002; Tue, 7 Feb 2017 23:45:57 +0800 From: "Wu, Jingjing" To: "Yigit, Ferruh" , "dev@dpdk.org" CC: "olivier.matz@6wind.com" , "Zhang, Helin" , "Ananyev, Konstantin" Thread-Topic: [dpdk-dev] [PATCH v3 1/4] net/i40e: fix bitmask of supported Tx flags Thread-Index: AQHSgPGk56GYAXebIUm8iDQuUMQA0qFdCaKAgACmxqA= Date: Tue, 7 Feb 2017 15:45:57 +0000 Message-ID: <9BB6961774997848B5B42BEC655768F810CD5CA6@SHSMSX103.ccr.corp.intel.com> References: <1486179375-133509-1-git-send-email-jingjing.wu@intel.com> <1486437727-83972-1-git-send-email-jingjing.wu@intel.com> <1486437727-83972-2-git-send-email-jingjing.wu@intel.com> <6f19a12e-8768-a8a1-52b0-9cdcba20fbc7@intel.com> In-Reply-To: <6f19a12e-8768-a8a1-52b0-9cdcba20fbc7@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 1/4] net/i40e: fix bitmask of supported Tx flags X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 07 Feb 2017 15:46:01 -0000 > > +#ifdef RTE_LIBRTE_IEEE1588 > > +#define I40E_TX_IEEE1588_TMST PKT_TX_IEEE1588_TMST #else #define > > +I40E_TX_IEEE1588_TMST 0 #endif > > + > > #define I40E_TX_CKSUM_OFFLOAD_MASK ( \ > > PKT_TX_IP_CKSUM | \ > > PKT_TX_L4_MASK | \ > > @@ -87,7 +93,9 @@ > > PKT_TX_OUTER_IP_CKSUM | \ > > PKT_TX_TCP_SEG | \ > > PKT_TX_QINQ_PKT | \ > > - PKT_TX_VLAN_PKT) > > + PKT_TX_VLAN_PKT | \ > > + PKT_TX_TUNNEL_MASK | \ > > + I40E_TX_IEEE1588_TMST) >=20 > PKT_TX_IEEE1588_TMST added into I40E_TX_OFFLOAD_MASK, but not into > PKT_TX_OFFLOAD_MASK (patch 4/4) >=20 > Shouldn't PKT_TX_OFFLOAD_MASK be a super set of driver ones. Otherwise > PKT_TX_IEEE1588_TMST will be marked as not supported according below > XOR logic. >=20 Yes, you are right. Should I send a new version patch set? Or just update t= he [4/4]? Thanks Jingjing > > > > #define I40E_TX_OFFLOAD_NOTSUP_MASK \ > > (PKT_TX_OFFLOAD_MASK ^ I40E_TX_OFFLOAD_MASK) > >