From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id EF3B12A5B; Thu, 23 Mar 2017 07:43:51 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1490251432; x=1521787432; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=fElUymexsTUMc3j3x09dSj0oxniTx46jN93sSPUvNR4=; b=CsDOpKTBb9hvzo6OA6BJv2AIplWCVDZMY0Ih+mxonsEZ6E0rcC0/ybyY lAcx7kyMEA4DrvFUoPmQbMf9kD3EQw==; Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Mar 2017 23:43:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,208,1486454400"; d="scan'208";a="1126081902" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga001.fm.intel.com with ESMTP; 22 Mar 2017 23:43:49 -0700 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 22 Mar 2017 23:43:49 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 22 Mar 2017 23:43:49 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.20]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.177]) with mapi id 14.03.0248.002; Thu, 23 Mar 2017 14:43:47 +0800 From: "Wu, Jingjing" To: "Guo, Jia" , "Zhang, Helin" CC: "dev@dpdk.org" , "stable@dpdk.org" Thread-Topic: [dpdk-dev v3 2/3] app: enable HW CRC strip by default Thread-Index: AQHSo5jQu8EY8FJngEaIZl4Ne++9lKGh+mFg Date: Thu, 23 Mar 2017 06:43:46 +0000 Message-ID: <9BB6961774997848B5B42BEC655768F810CFA52F@SHSMSX103.ccr.corp.intel.com> References: <1490003874-37766-2-git-send-email-jia.guo@intel.com> <1490247839-110341-1-git-send-email-jia.guo@intel.com> <1490247839-110341-2-git-send-email-jia.guo@intel.com> In-Reply-To: <1490247839-110341-2-git-send-email-jia.guo@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [dpdk-dev v3 2/3] app: enable HW CRC strip by default X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 23 Mar 2017 06:43:52 -0000 > -----Original Message----- > From: Guo, Jia > Sent: Thursday, March 23, 2017 1:44 PM > To: Zhang, Helin ; Wu, Jingjing > > Cc: dev@dpdk.org; Guo, Jia ; stable@dpdk.org > Subject: [dpdk-dev v3 2/3] app: enable HW CRC strip by default >=20 > Since VF has no ability to disable/enable HW CRC strip for non-DPDK PF dr= ivers, > and for most case of kernel driver default enable HW CRC strip, if disabl= e HW > CRC strip in app's rxmode, VF driver will return fail and result the VF l= aunch > failure. So this patch default to enable HW CRC strip to let VF launch su= ccessful. >=20 > Signed-off-by: Jeff Guo > Cc: stable@dpdk.org Acked-by Jingjing Wu