From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 698ED695C; Thu, 23 Mar 2017 07:44:26 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1490251466; x=1521787466; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=rdc+nhILC0DaIiq7ZXd/zzzvCqE/TT0IdEKrH3BUC5c=; b=hgLPGAx1r3GqMWqSNQG1SmAe/ji3iXwBTp8iMT5hQJZG5ahV4rKRGg98 4L926viH9jAwz67YwQMkCnWYDd3bQA==; Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Mar 2017 23:44:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,208,1486454400"; d="scan'208";a="837666852" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by FMSMGA003.fm.intel.com with ESMTP; 22 Mar 2017 23:44:25 -0700 Received: from fmsmsx154.amr.corp.intel.com (10.18.116.70) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 22 Mar 2017 23:44:25 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by FMSMSX154.amr.corp.intel.com (10.18.116.70) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 22 Mar 2017 23:44:24 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.20]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.177]) with mapi id 14.03.0248.002; Thu, 23 Mar 2017 14:43:58 +0800 From: "Wu, Jingjing" To: "Guo, Jia" , "Zhang, Helin" CC: "dev@dpdk.org" , "stable@dpdk.org" Thread-Topic: [dpdk-dev v3 3/3] test: enable HW CRC strip by default Thread-Index: AQHSo5jR2TlSezQTiUa0QtEaua1CsaGh+nSg Date: Thu, 23 Mar 2017 06:43:58 +0000 Message-ID: <9BB6961774997848B5B42BEC655768F810CFA53C@SHSMSX103.ccr.corp.intel.com> References: <1490003874-37766-2-git-send-email-jia.guo@intel.com> <1490247839-110341-1-git-send-email-jia.guo@intel.com> <1490247839-110341-3-git-send-email-jia.guo@intel.com> In-Reply-To: <1490247839-110341-3-git-send-email-jia.guo@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [dpdk-dev v3 3/3] test: enable HW CRC strip by default X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 23 Mar 2017 06:44:26 -0000 > -----Original Message----- > From: Guo, Jia > Sent: Thursday, March 23, 2017 1:44 PM > To: Zhang, Helin ; Wu, Jingjing > > Cc: dev@dpdk.org; Guo, Jia ; stable@dpdk.org > Subject: [dpdk-dev v3 3/3] test: enable HW CRC strip by default >=20 > Since VF has no ability to disable/enable HW CRC strip for non-DPDK PF dr= ivers, > and for most case of kernel driver default enable HW CRC strip, if disabl= e HW > CRC strip in test app's rxmode, VF driver will return fail and result the= VF > launch failure. So this patch default to enable HW CRC strip to let VF la= unch > successful. >=20 > Signed-off-by: Jeff Guo > Cc: stable@dpdk.org Acked-by Jingjing Wu