From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 85E7E7CB6 for ; Sat, 23 Sep 2017 04:58:31 +0200 (CEST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga104.jf.intel.com with ESMTP; 22 Sep 2017 19:58:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,428,1500966000"; d="scan'208";a="1175012627" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga001.jf.intel.com with ESMTP; 22 Sep 2017 19:58:30 -0700 Received: from fmsmsx158.amr.corp.intel.com (10.18.116.75) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 22 Sep 2017 19:58:30 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by fmsmsx158.amr.corp.intel.com (10.18.116.75) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 22 Sep 2017 19:58:29 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.213]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.159]) with mapi id 14.03.0319.002; Sat, 23 Sep 2017 10:58:27 +0800 From: "Wu, Jingjing" To: "Xing, Beilei" CC: "Chilikin, Andrey" , "dev@dpdk.org" Thread-Topic: [PATCH v3 2/8] net/i40e: update ptype and pctype info Thread-Index: AQHTM4cyV7dMlcCnyEuMU0I6Q+23pKLBwjCw Date: Sat, 23 Sep 2017 02:58:27 +0000 Message-ID: <9BB6961774997848B5B42BEC655768F810E7B1E3@SHSMSX103.ccr.corp.intel.com> References: <1504783263-20575-1-git-send-email-beilei.xing@intel.com> <1506119714-53437-1-git-send-email-beilei.xing@intel.com> <1506119714-53437-3-git-send-email-beilei.xing@intel.com> In-Reply-To: <1506119714-53437-3-git-send-email-beilei.xing@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMGZjOWZlYjctZDI3OC00MTU2LWEwNTItYjY1MGU1NGY4MTFmIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6ImlUV2tQRXV5eHR3R1hpRUF6MmtZeStVdklqWTdjdUdpdFBENzBQa1B1Wm89In0= x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 2/8] net/i40e: update ptype and pctype info X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 23 Sep 2017 02:58:32 -0000 > + if (!memcmp(name, "GTPC", sizeof("GTPC") - 1)) > + new_pctype =3D > + i40e_find_personalized_pctype(pf, > + I40E_PERSONALIZED_GTPC); > + else if (!memcmp(name, "GTPU_IPV4", > + sizeof("GTPU_IPV4") - 1)) Memcmp -> strcmp? [......] >=20 > +enum i40e_new_proto { > + I40E_PERSONALIZED_GTPC =3D 0, > + I40E_PERSONALIZED_GTPU_IPV4, > + I40E_PERSONALIZED_GTPU_IPV6, > + I40E_PERSONALIZED_GTPU, > + I40E_PERSONALIZED_MAX, > +}; > + > +#define I40E_FILTER_PCTYPE_INVALID 0 > +struct i40e_personalized_pctype { > + uint8_t index; /* Indicate which personalized pctype */ The index is I40E_PERSONALIZED_XXX right? Why not define it like enum i40e_new_proto index? Or you can just use #define to define personalized pctype instead of enum. > + uint8_t pctype; /* New pctype value */ > + bool valid; /* Check if it's valid */ > +}; > + > /* > * Structure to store private data specific for PF instance. > */ > @@ -786,6 +801,11 @@ struct i40e_pf { > bool mpls_replace_flag; /* 1 - MPLS filter replace is done */ > bool qinq_replace_flag; /* QINQ filter replace is done */ > struct i40e_tm_conf tm_conf; > + > + /* Dynamic Device Personalization */ > + bool gtp_support; /* 1 - support GTP-C and GTP-U */ > + /* customer personalized pctype */ > + struct i40e_personalized_pctype new_pctype[I40E_PERSONALIZED_MAX]; > }; >=20 > enum pending_msg { > @@ -1003,6 +1023,10 @@ void i40e_check_write_reg(struct i40e_hw *hw, uint= 32_t addr, > uint32_t val); > int i40e_tm_ops_get(struct rte_eth_dev *dev, void *ops); > void i40e_tm_conf_init(struct rte_eth_dev *dev); > void i40e_tm_conf_uninit(struct rte_eth_dev *dev); > +struct i40e_personalized_pctype* > +i40e_find_personalized_pctype(struct i40e_pf *pf, uint8_t index); > +void i40e_update_personalized_info(struct rte_eth_dev *dev, uint8_t *pkg= , > + uint32_t pkg_size); >=20 > #define I40E_DEV_TO_PCI(eth_dev) \ > RTE_DEV_TO_PCI((eth_dev)->device) > diff --git a/drivers/net/i40e/rte_pmd_i40e.c b/drivers/net/i40e/rte_pmd_i= 40e.c > index 9f9c808..d1313f6 100644 > --- a/drivers/net/i40e/rte_pmd_i40e.c > +++ b/drivers/net/i40e/rte_pmd_i40e.c > @@ -1608,6 +1608,8 @@ rte_pmd_i40e_process_ddp_package(uint8_t port, uint= 8_t > *buff, > return -EINVAL; > } >=20 > + i40e_update_personalized_info(dev, buff, size); > + > /* Find metadata segment */ > metadata_seg_hdr =3D i40e_find_segment_in_package(SEGMENT_TYPE_METADATA= , > pkg_hdr); > @@ -2090,7 +2092,9 @@ static int check_invalid_pkt_type(uint32_t pkt_type= ) > tnl !=3D RTE_PTYPE_TUNNEL_VXLAN && > tnl !=3D RTE_PTYPE_TUNNEL_NVGRE && > tnl !=3D RTE_PTYPE_TUNNEL_GENEVE && > - tnl !=3D RTE_PTYPE_TUNNEL_GRENAT) > + tnl !=3D RTE_PTYPE_TUNNEL_GRENAT && > + tnl !=3D RTE_PTYPE_TUNNEL_GTPC && > + tnl !=3D RTE_PTYPE_TUNNEL_GTPU) > return -1; >=20 > if (il2 && > -- > 2.5.5