From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1A7B0A0599; Fri, 10 Apr 2020 04:06:01 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3154E1D448; Fri, 10 Apr 2020 04:06:00 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id B45981D440 for ; Fri, 10 Apr 2020 04:05:58 +0200 (CEST) IronPort-SDR: 2QhZR0/hkrkTXtqPPZQn3koR2ej4I5q996zMqueMY18NyrN/Aqxwu8+IWfgcLFBqMVKIXShQls 2Q+MX6d2nOew== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2020 19:05:57 -0700 IronPort-SDR: H5qiog59BaojZfo9ROxkHnaCLoNwT9VDw07yiUsJGCarElb/sogkN13EvXoW9eFCvuaNhN1gu1 Acc+5roP525Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,364,1580803200"; d="scan'208";a="425740434" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga005.jf.intel.com with ESMTP; 09 Apr 2020 19:05:57 -0700 Received: from shsmsx605.ccr.corp.intel.com (10.109.6.215) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 9 Apr 2020 19:05:57 -0700 Received: from shsmsx606.ccr.corp.intel.com (10.109.6.216) by SHSMSX605.ccr.corp.intel.com (10.109.6.215) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Fri, 10 Apr 2020 10:05:54 +0800 Received: from shsmsx606.ccr.corp.intel.com ([10.109.6.216]) by SHSMSX606.ccr.corp.intel.com ([10.109.6.216]) with mapi id 15.01.1713.004; Fri, 10 Apr 2020 10:05:54 +0800 From: "Lu, Nannan" To: "Zhao1, Wei" , "dev@dpdk.org" CC: "Zhang, Qi Z" , "Peng, Yuan" Thread-Topic: [PATCH 1/3] net/ice/base: check the number of recipe when in chain Thread-Index: AQHWDtPnIQO+PFslW0i+NXvj/4skpahxm2uQ Date: Fri, 10 Apr 2020 02:05:54 +0000 Message-ID: <9d06fb7728784414ae4995d4a7beac4e@intel.com> References: <20200410004157.3032-1-wei.zhao1@intel.com> <20200410004157.3032-2-wei.zhao1@intel.com> In-Reply-To: <20200410004157.3032-2-wei.zhao1@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 1/3] net/ice/base: check the number of recipe when in chain X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Tested-by: Lu, Nannan -----Original Message----- From: Zhao1, Wei=20 Sent: Friday, April 10, 2020 8:42 AM To: dev@dpdk.org Cc: Zhang, Qi Z ; Lu, Nannan ; P= eng, Yuan ; Zhao1, Wei Subject: [PATCH 1/3] net/ice/base: check the number of recipe when in chain when we add some long switch rule, we need check the number of final recipe= number, if it is large than ICE_MAX_CHAIN_RECIPE, we should refuse this ru= le. For example: "flow create 0 ingress pattern eth / ipv6 src is CDCD:910A:2222:5498:8475:1= 111:3900:1536 dst is CDCD:910A:2222:5498:8475:1111:3900:2022 tc is 3 / udp dst is 45 / end actions queue index 2 / end" This rule will consum 6 recipe, if it is not refused, it will cause the fol= lowing code over write of lkup_indx and mask. LIST_FOR_EACH_ENTRY(entry, &rm->rg_list, ice_recp_grp_entry, l_entry) { last_chain_entry->fv_idx[i] =3D entry->chain_idx; buf[recps].content.lkup_indx[i] =3D entry->chain_idx; buf[recps].content.mask[i++] =3D CPU_TO_LE16(0xFFFF); .......... } Signed-off-by: Wei Zhao --- drivers/net/ice/base/ice_switch.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_s= witch.c index b5aa5abd9..c17219274 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -5352,6 +5352,9 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_re= cipe *rm, rm->n_grp_count++; } =20 + if (rm->n_grp_count > ICE_MAX_CHAIN_RECIPE) + return ICE_ERR_MAX_LIMIT; + tmp =3D (struct ice_aqc_recipe_data_elem *)ice_calloc(hw, ICE_MAX_NUM_RECIPES, sizeof(*tmp)); -- 2.19.1