From: Shijith Thotton <sthotton@marvell.com>
To: <dev@dpdk.org>
Cc: Shijith Thotton <sthotton@marvell.com>, <jerinj@marvell.com>,
<ndabilpuram@marvell.com>, <anoobj@marvell.com>,
<pbhagavatula@marvell.com>, <gakhil@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
"Sunil Kumar Kori" <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>
Subject: [dpdk-dev] [PATCH v2 3/8] common/cnxk: add API to check CPT IQ is full
Date: Thu, 2 Sep 2021 17:47:19 +0530 [thread overview]
Message-ID: <9f0c4db1de799f820c3a81376a5178b78fbbe01d.1630584303.git.sthotton@marvell.com> (raw)
In-Reply-To: <cover.1630584303.git.sthotton@marvell.com>
Added flow control based check to determine CPT IQ is full.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
---
drivers/common/cnxk/roc_cpt.c | 6 ++++--
drivers/common/cnxk/roc_cpt.h | 11 +++++++++++
drivers/common/cnxk/roc_cpt_priv.h | 6 ------
3 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index c001497f74..5e35d1bdda 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -464,6 +464,8 @@ cpt_iq_init(struct roc_cpt_lf *lf)
plt_write64(lf_q_size.u, lf->rbase + CPT_LF_Q_SIZE);
lf->fc_addr = (uint64_t *)addr;
+ lf->fc_hyst_bits = plt_log2_u32(lf->nb_desc) / 2;
+ lf->fc_thresh = lf->nb_desc - (lf->nb_desc % (1 << lf->fc_hyst_bits));
}
int
@@ -809,8 +811,8 @@ roc_cpt_iq_enable(struct roc_cpt_lf *lf)
lf_ctl.u = plt_read64(lf->rbase + CPT_LF_CTL);
lf_ctl.s.ena = 1;
lf_ctl.s.fc_ena = 1;
- lf_ctl.s.fc_up_crossing = 1;
- lf_ctl.s.fc_hyst_bits = CPT_FC_NUM_HYST_BITS;
+ lf_ctl.s.fc_up_crossing = 0;
+ lf_ctl.s.fc_hyst_bits = lf->fc_hyst_bits;
plt_write64(lf_ctl.u, lf->rbase + CPT_LF_CTL);
cpt_lf_dump(lf);
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index 3a2f5b97e1..f0f505a8c2 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -94,6 +94,8 @@ struct roc_cpt_lf {
uint16_t msixoff;
uint16_t pf_func;
uint64_t *fc_addr;
+ uint32_t fc_hyst_bits;
+ uint64_t fc_thresh;
uint64_t io_addr;
uint8_t *iq_vaddr;
struct roc_nix *inl_outb_nix;
@@ -121,6 +123,15 @@ struct roc_cpt_rxc_time_cfg {
uint16_t zombie_thres;
};
+static inline int
+roc_cpt_is_iq_full(struct roc_cpt_lf *lf)
+{
+ if (*lf->fc_addr < lf->fc_thresh)
+ return 0;
+
+ return 1;
+}
+
int __roc_api roc_cpt_rxc_time_cfg(struct roc_cpt *roc_cpt,
struct roc_cpt_rxc_time_cfg *cfg);
int __roc_api roc_cpt_dev_init(struct roc_cpt *roc_cpt);
diff --git a/drivers/common/cnxk/roc_cpt_priv.h b/drivers/common/cnxk/roc_cpt_priv.h
index 0880ec098d..21911e5d79 100644
--- a/drivers/common/cnxk/roc_cpt_priv.h
+++ b/drivers/common/cnxk/roc_cpt_priv.h
@@ -5,12 +5,6 @@
#ifndef _ROC_CPT_PRIV_H_
#define _ROC_CPT_PRIV_H_
-/* Set number of hystbits to 6.
- * This will trigger the FC writes whenever number of outstanding commands in
- * the queue becomes multiple of 32.
- */
-#define CPT_FC_NUM_HYST_BITS 6
-
struct cpt {
struct plt_pci_device *pci_dev;
struct dev dev;
--
2.25.1
next prev parent reply other threads:[~2021-09-02 12:21 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-30 11:09 [dpdk-dev] [PATCH 0/8] Crypto adapter support for Marvell CNXK driver Shijith Thotton
2021-08-30 11:09 ` [dpdk-dev] [PATCH 1/8] net/cnxk: add flag to show CPT can enqueue events Shijith Thotton
2021-08-30 11:09 ` [dpdk-dev] [PATCH 2/8] event/cnxk: add macro to set eventdev ops Shijith Thotton
2021-08-30 11:09 ` [dpdk-dev] [PATCH 3/8] common/cnxk: add API to check CPT IQ is full Shijith Thotton
2021-08-30 11:09 ` [dpdk-dev] [PATCH 4/8] drivers: add cnxk crypto adapter eventdev ops Shijith Thotton
2021-08-30 11:09 ` [dpdk-dev] [PATCH 5/8] crypto/cnxk: add cn9k crypto adapter fast path ops Shijith Thotton
2021-08-31 15:43 ` Kinsella, Ray
2021-09-01 8:45 ` [dpdk-dev] [EXT] " Anoob Joseph
2021-08-30 11:09 ` [dpdk-dev] [PATCH 6/8] event/cnxk: " Shijith Thotton
2021-08-30 11:09 ` [dpdk-dev] [PATCH 7/8] crypto/cnxk: add cn10k " Shijith Thotton
2021-08-31 15:42 ` Kinsella, Ray
2021-09-01 8:46 ` [dpdk-dev] [EXT] " Anoob Joseph
2021-08-30 11:09 ` [dpdk-dev] [PATCH 8/8] event/cnxk: " Shijith Thotton
2021-09-02 12:17 ` [dpdk-dev] [PATCH v2 0/8] Crypto adapter support for Marvell CNXK driver Shijith Thotton
2021-09-02 12:17 ` [dpdk-dev] [PATCH v2 1/8] net/cnxk: add flag to show CPT can enqueue events Shijith Thotton
2021-09-02 12:17 ` [dpdk-dev] [PATCH v2 2/8] event/cnxk: add macro to set eventdev ops Shijith Thotton
2021-09-02 12:17 ` Shijith Thotton [this message]
2021-09-02 12:17 ` [dpdk-dev] [PATCH v2 4/8] drivers: add cnxk crypto adapter " Shijith Thotton
2021-09-02 12:17 ` [dpdk-dev] [PATCH v2 5/8] crypto/cnxk: add cn9k crypto adapter fast path ops Shijith Thotton
2021-09-02 12:17 ` [dpdk-dev] [PATCH v2 6/8] event/cnxk: " Shijith Thotton
2021-09-02 12:17 ` [dpdk-dev] [PATCH v2 7/8] crypto/cnxk: add cn10k " Shijith Thotton
2021-09-02 12:17 ` [dpdk-dev] [PATCH v2 8/8] event/cnxk: " Shijith Thotton
2021-09-02 14:41 ` [dpdk-dev] [PATCH v3 0/8] Crypto adapter support for Marvell CNXK driver Shijith Thotton
2021-09-02 14:41 ` [dpdk-dev] [PATCH v3 1/8] net/cnxk: add flag to show CPT can enqueue events Shijith Thotton
2021-09-02 14:41 ` [dpdk-dev] [PATCH v3 2/8] event/cnxk: add macro to set eventdev ops Shijith Thotton
2021-09-02 14:41 ` [dpdk-dev] [PATCH v3 3/8] common/cnxk: add API to check CPT IQ is full Shijith Thotton
2021-09-02 14:41 ` [dpdk-dev] [PATCH v3 4/8] drivers: add cnxk crypto adapter eventdev ops Shijith Thotton
2021-09-02 14:41 ` [dpdk-dev] [PATCH v3 5/8] crypto/cnxk: add cn9k crypto adapter fast path ops Shijith Thotton
2021-09-02 14:41 ` [dpdk-dev] [PATCH v3 6/8] event/cnxk: " Shijith Thotton
2021-09-02 14:41 ` [dpdk-dev] [PATCH v3 7/8] crypto/cnxk: add cn10k " Shijith Thotton
2021-09-02 14:41 ` [dpdk-dev] [PATCH v3 8/8] event/cnxk: " Shijith Thotton
2021-09-03 15:04 ` [dpdk-dev] [PATCH v3 0/8] Crypto adapter support for Marvell CNXK driver Akhil Goyal
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