From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 69618A04DD; Wed, 28 Oct 2020 04:48:42 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8BCA76A16; Wed, 28 Oct 2020 04:48:40 +0100 (CET) Received: from out0-138.mail.aliyun.com (out0-138.mail.aliyun.com [140.205.0.138]) by dpdk.org (Postfix) with ESMTP id 479AC6A16 for ; Wed, 28 Oct 2020 04:48:38 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alibaba-inc.com; s=default; t=1603856916; h=Subject:From:To:Message-ID:Date:MIME-Version:Content-Type; bh=4uevEIamUcYH7F7Qv6tCYOFGEkALNyR9PQwvd/mx23U=; b=mOdlTewo9ci86lc66p01WDPVLn4e32+xVTH1SzHn1oeaxw/k23ubrEoo9o1gb2ZFDGSSfxJDW3CwEY0LOLRgNHoEqmbMtBdHCF1IXVfn+3yiVrAizLo348o4jGMitNCURU7Ku/9tvRjRXYYoi4WnnL3Pzk8vB17JeTykNSxEmMw= X-Alimail-AntiSpam: AC=PASS; BC=-1|-1; BR=01201311R181e4; CH=green; DM=||false|; DS=||; FP=0|-1|-1|-1|0|-1|-1|-1; HT=ay29a033018047194; MF=huawei.xhw@alibaba-inc.com; NM=1; PH=DS; RN=8; SR=0; TI=SMTPD_---.IpMDHk8_1603856915; Received: from 30.43.76.173(mailfrom:huawei.xhw@alibaba-inc.com fp:SMTPD_---.IpMDHk8_1603856915) by smtp.aliyun-inc.com(127.0.0.1); Wed, 28 Oct 2020 11:48:35 +0800 From: "=?UTF-8?B?6LCi5Y2O5LyfKOatpOaXtuatpOWIu++8iQ==?=" To: ferruh.yigit@intel.com Cc: dev@dpdk.org, maxime.coquelin@redhat.com, anatoly.burakov@intel.com, david.marchand@redhat.com, zhihong.wang@intel.com, chenbo.xia@intel.com, grive@u256.net References: <68ecd941-9c56-4de7-fae2-2ad15bdfd81a@alibaba-inc.com> <1603381885-88819-1-git-send-email-huawei.xhw@alibaba-inc.com> <62b7cfc1-cba9-4e6c-61ed-f08ae9fa7829@alibaba-inc.com> Message-ID: <9f79a2e2-6302-0fb4-e3d4-d7488292711b@alibaba-inc.com> Date: Wed, 28 Oct 2020 11:48:09 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.3.3 MIME-Version: 1.0 In-Reply-To: <62b7cfc1-cba9-4e6c-61ed-f08ae9fa7829@alibaba-inc.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US Subject: Re: [dpdk-dev] [PATCH v5 0/3] support both PIO and MMIO BAR for virtio PMD X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 2020/10/27 16:50, chris wrote: > @Ferruh: this patch is tested with both PIO and MMIO bar using testpmd > and start tx_first. > > vfio/igb_uio tested with MMIO bar (uio_pci_generic doesn't work with > msix, so it isn't tested) > > uio_pci_generic tested with PIO bar (igb_uio has unknown symbols, not > tested).     igb_uio with PIO bar is also tested. > > Weird igb_uio doens't have Makefile. > > > On 2020/10/22 23:51, 谢华伟(此时此刻） wrote: >> From: "huawei.xhw" >> >> Legacy virtio-pci only supports PIO BAR resource. As we need to >> create lots of >> virtio devices and PIO resource on x86 is very limited, we expose >> MMIO BAR. >> >> Kernel supports both PIO  and MMIO BAR for legacy virtio-pci device. >> We handles >> different type of BAR in the similar way. >> >> In previous implementation, with igb_uio we get PIO address from igb_uio >> sysfs entry; with uio_pci_generic, we get PIO address from >> /proc/ioports. >> For PIO/MMIO RW, there is different path for different drivers and arch. >> For VFIO, PIO/MMIO RW is through syscall, which has big performance >> issue. >> On X86, it assumes only PIO is supported. >> >> All of the above is too much twisted. >> This patch unifies the way to get both PIO and MMIO address for >> different driver >> and arch, all from standard resource attr under pci sysfs. >> >> We distinguish PIO and MMIO by their address like how kernel does. It >> is ugly but works. >> >> v2 changes: >>      - add more explanation in the commit message >> >> v3 changes: >>      - fix patch format issues >> >> v4 changes: >>      - fixes for RTE_KDRV_UIO_GENERIC -> RTE_PCI_KDRV_UIO_GENERIC >> >> v5 changes: >>      - split into three seperate patches >> >> huawei.xhw (3): >>    PCI: use PCI standard sysfs entry to get PIO address >>    PCI: support MMIO in rte_pci_ioport_map/unap/read/write >>    PCI: don't use vfio ioctl call to access PIO resource >> >>   drivers/bus/pci/linux/pci.c     |  89 +------------------- >>   drivers/bus/pci/linux/pci_uio.c | 177 >> ++++++++++++++++++++++++++++------------ >>   2 files changed, 128 insertions(+), 138 deletions(-) >>