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From: "Zhao1, Wei" <wei.zhao1@intel.com>
To: "Yigit, Ferruh" <ferruh.yigit@intel.com>,
	"Wu, Jingjing" <jingjing.wu@intel.com>,
	"Lu, Wenzhuo" <wenzhuo.lu@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
	"Yigit, Ferruh" <ferruh.yigit@intel.com>,
	"stable@dpdk.org" <stable@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH] net/avf/base: fix shifting 32 bits signed	variable 31 times
Date: Wed, 31 Oct 2018 03:34:28 +0000	[thread overview]
Message-ID: <A2573D2ACFCADC41BB3BE09C6DE313CA07E67DC5@PGSMSX103.gar.corp.intel.com> (raw)
In-Reply-To: <20181028035133.67106-1-ferruh.yigit@intel.com>



> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Ferruh Yigit
> Sent: Sunday, October 28, 2018 11:52 AM
> To: Wu, Jingjing <jingjing.wu@intel.com>; Lu, Wenzhuo
> <wenzhuo.lu@intel.com>
> Cc: dev@dpdk.org; Yigit, Ferruh <ferruh.yigit@intel.com>; stable@dpdk.org
> Subject: [dpdk-dev] [PATCH] net/avf/base: fix shifting 32 bits signed variable
> 31 times
> 
> Fixes: e5b2a9e957e7 ("net/avf/base: add base code for avf PMD")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
> ---
>  drivers/net/avf/base/avf_register.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/avf/base/avf_register.h
> b/drivers/net/avf/base/avf_register.h
> index ba5a9f3fa..adb989583 100644
> --- a/drivers/net/avf/base/avf_register.h
> +++ b/drivers/net/avf/base/avf_register.h
> @@ -76,7 +76,7 @@ POSSIBILITY OF SUCH DAMAGE.
>  #define AVF_ARQLEN1_ARQCRIT_SHIFT   30
>  #define AVF_ARQLEN1_ARQCRIT_MASK    AVF_MASK(0x1,
> AVF_ARQLEN1_ARQCRIT_SHIFT)
>  #define AVF_ARQLEN1_ARQENABLE_SHIFT 31
> -#define AVF_ARQLEN1_ARQENABLE_MASK  AVF_MASK(0x1,
> AVF_ARQLEN1_ARQENABLE_SHIFT)
> +#define AVF_ARQLEN1_ARQENABLE_MASK  AVF_MASK(0x1U,
> +AVF_ARQLEN1_ARQENABLE_SHIFT)
>  #define AVF_ARQT1            0x00007000 /* Reset: EMPR */
>  #define AVF_ARQT1_ARQT_SHIFT 0
>  #define AVF_ARQT1_ARQT_MASK  AVF_MASK(0x3FF,
> AVF_ARQT1_ARQT_SHIFT) @@ -99,7 +99,7 @@ POSSIBILITY OF SUCH
> DAMAGE.
>  #define AVF_ATQLEN1_ATQCRIT_SHIFT   30
>  #define AVF_ATQLEN1_ATQCRIT_MASK    AVF_MASK(0x1,
> AVF_ATQLEN1_ATQCRIT_SHIFT)
>  #define AVF_ATQLEN1_ATQENABLE_SHIFT 31
> -#define AVF_ATQLEN1_ATQENABLE_MASK  AVF_MASK(0x1,
> AVF_ATQLEN1_ATQENABLE_SHIFT)
> +#define AVF_ATQLEN1_ATQENABLE_MASK  AVF_MASK(0x1U,
> +AVF_ATQLEN1_ATQENABLE_SHIFT)
>  #define AVF_ATQT1            0x00008400 /* Reset: EMPR */
>  #define AVF_ATQT1_ATQT_SHIFT 0
>  #define AVF_ATQT1_ATQT_MASK  AVF_MASK(0x3FF,
> AVF_ATQT1_ATQT_SHIFT)
> --
> 2.17.2

I have test this code change with a small function to observe the difference.
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>

#define AVF_ARQLEN1_ARQENABLE_SHIFT 31
#define AVF_MASK(mask, shift) (mask << shift)
#define AVF_ARQLEN1_ARQENABLE_MASK1  AVF_MASK(0x1, AVF_ARQLEN1_ARQENABLE_SHIFT)
#define AVF_ARQLEN1_ARQENABLE_MASK2  AVF_MASK(0x1U, AVF_ARQLEN1_ARQENABLE_SHIFT)

void main(int argc,char **argv)
{
        signed int a=1;

        printf("Hello Linux\n");
        printf("%x,=%x\n",AVF_ARQLEN1_ARQENABLE_MASK1,AVF_ARQLEN1_ARQENABLE_MASK2);
        printf("a=%x\n",a<<31);

}

  reply	other threads:[~2018-10-31  3:39 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-28  3:51 Ferruh Yigit
2018-10-31  3:34 ` Zhao1, Wei [this message]
2018-11-05 14:30   ` Ferruh Yigit
2018-11-07  2:42     ` Zhao1, Wei
2018-11-05 15:03   ` Ferruh Yigit

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