Re: [dpdk-dev] DEV_RX_OFFLOAD_VLAN_EXTEND offload

["Zhao1, Wei" <wei.zhao1@intel.com>]

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Jerin Jacob
> Sent: Friday, October 26, 2018 10:35 PM
> To: Yigit, Ferruh <ferruh.yigit@intel.com>
> Cc: dev@dpdk.org; thomas@monjalon.net; arybchenko@solarflare.com;
> olivier.matz@6wind.com; Zhang, Qi Z <qi.z.zhang@intel.com>; Xing, Beilei
> <beilei.xing@intel.com>; Lu, Wenzhuo <wenzhuo.lu@intel.com>; Ananyev,
> Konstantin <konstantin.ananyev@intel.com>
> Subject: Re: [dpdk-dev] DEV_RX_OFFLOAD_VLAN_EXTEND offload
> 
> -----Original Message-----
> > Date: Fri, 26 Oct 2018 14:40:42 +0100
> > From: Ferruh Yigit <ferruh.yigit@intel.com>
> > To: Jerin Jacob <jerin.jacob@caviumnetworks.com>, "dev@dpdk.org"
> >  <dev@dpdk.org>
> > CC: "thomas@monjalon.net" <thomas@monjalon.net>,
> > "arybchenko@solarflare.com" <arybchenko@solarflare.com>,
> > "olivier.matz@6wind.com" <olivier.matz@6wind.com>,
> "qi.z.zhang@intel.com"
> >  <qi.z.zhang@intel.com>, "beilei.xing@intel.com"
> > <beilei.xing@intel.com>,  Wenzhuo Lu <wenzhuo.lu@intel.com>,
> > Konstantin Ananyev  <konstantin.ananyev@intel.com>
> > Subject: Re: [dpdk-dev] DEV_RX_OFFLOAD_VLAN_EXTEND offload
> > User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0)
> > Gecko/20100101
> >  Thunderbird/52.9.1
> >
> >
> > On 10/26/2018 11:56 AM, Jerin Jacob wrote:
> > >
> > > Does anyone know the expectation of
> DEV_RX_OFFLOAD_VLAN_EXTEND
> > > offload? Does not look like it is documented.
> > >
> > > Looks like it is very specific to Intel controllers, Based on 82599
> > > HRM, it is following, not sure what is the real expectation from NIC
> > > in normative terms.
> > >
> > > Extended VLAN.
> > > -------------
> > > When set, all incoming Rx packets are expected to have at least one
> > > VLAN with the Ether type as defined in EXVET register. The packets
> > > can have an inner-VLAN that should be used for all filtering
> > > purposes. All Tx packets are expected to have at least one VLAN
> > > added to them by the host. In the case of an additional VLAN request
> > > (VLE), the inner-VLAN is added by the hardware after the outer-VLAN is
> added by the host.
> > > This bit should only be reset by a PCIe reset and should only be
> > > changed while Tx and Rx processes are stopped.
> > > The exception to this rule are MAC control packets such as flow
> > > control, 802.1x, LACP, etc. that never carry a VLAN tag of any type
> > >
> >
> > This looks similar to QinQ but it seems not, in ixgbe datasheet it has:
> 
> Yes. QinQ there is an already an offload called
> DEV_RX_OFFLOAD_QINQ_STRIP

Excuse me, I have some thought, is that right?
maybe DEV_RX_OFFLOAD_QINQ_STRIP and DEV_RX_OFFLOAD_VLAN_EXTEND is just two thing that play a different role each.
DEV_RX_OFFLOAD_VLAN_EXTEND tell NIC to recognize QinQ PACKETS, it is a filter for NIC.
DEV_RX_OFFLOAD_QINQ_STRIP tell nic to strip 2 inner and outer vlan head when moving packets from nic to host memory.
I40e NIC is the normative terms when handling qinq packets.

> 
> 
> >
> > "
> > Double VLAN and Single VLAN Support
> > -----------------------------------
> > <....>
> >  This mode is used for systems where the near end switch adds the
> > outer VLAN header containing switching information.
> > <...>
> > "
> >
> > And it in this mode hw doesn't insert or strip the outer VLAN, it
> > expect SW does it. The ethernet type is not 0x88A8 but can be anything
> > set on EXVET.VET_EXT. So looks like it is to let switch to add custom VLAN
> tags and NIC to ignore them.