From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id E74365911 for ; Thu, 1 Nov 2018 10:54:24 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Nov 2018 02:54:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,451,1534834800"; d="scan'208";a="87781269" Received: from kmsmsx155.gar.corp.intel.com ([172.21.73.106]) by orsmga006.jf.intel.com with ESMTP; 01 Nov 2018 02:54:22 -0700 Received: from pgsmsx103.gar.corp.intel.com ([169.254.2.114]) by KMSMSX155.gar.corp.intel.com ([169.254.15.19]) with mapi id 14.03.0415.000; Thu, 1 Nov 2018 17:50:12 +0800 From: "Zhao1, Wei" To: Jerin Jacob , "Yigit, Ferruh" CC: "dev@dpdk.org" , "thomas@monjalon.net" , "arybchenko@solarflare.com" , "olivier.matz@6wind.com" , "Zhang, Qi Z" , "Xing, Beilei" , "Lu, Wenzhuo" , "Ananyev, Konstantin" Thread-Topic: [dpdk-dev] DEV_RX_OFFLOAD_VLAN_EXTEND offload Thread-Index: AQHUbTGL1nj75pyEYkGncVv7Ym90eKUxEcMAgAmhgrA= Date: Thu, 1 Nov 2018 09:50:12 +0000 Message-ID: References: <20181026105559.GA6843@jerin> <1888b918-6871-eadc-6aa1-fbf6b0cf48fe@intel.com> <20181026143508.GA2616@jerin> In-Reply-To: <20181026143508.GA2616@jerin> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [172.30.20.205] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] DEV_RX_OFFLOAD_VLAN_EXTEND offload X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 01 Nov 2018 09:54:25 -0000 > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Jerin Jacob > Sent: Friday, October 26, 2018 10:35 PM > To: Yigit, Ferruh > Cc: dev@dpdk.org; thomas@monjalon.net; arybchenko@solarflare.com; > olivier.matz@6wind.com; Zhang, Qi Z ; Xing, Beilei > ; Lu, Wenzhuo ; Ananyev, > Konstantin > Subject: Re: [dpdk-dev] DEV_RX_OFFLOAD_VLAN_EXTEND offload >=20 > -----Original Message----- > > Date: Fri, 26 Oct 2018 14:40:42 +0100 > > From: Ferruh Yigit > > To: Jerin Jacob , "dev@dpdk.org" > > > > CC: "thomas@monjalon.net" , > > "arybchenko@solarflare.com" , > > "olivier.matz@6wind.com" , > "qi.z.zhang@intel.com" > > , "beilei.xing@intel.com" > > , Wenzhuo Lu , > > Konstantin Ananyev > > Subject: Re: [dpdk-dev] DEV_RX_OFFLOAD_VLAN_EXTEND offload > > User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) > > Gecko/20100101 > > Thunderbird/52.9.1 > > > > > > On 10/26/2018 11:56 AM, Jerin Jacob wrote: > > > > > > Does anyone know the expectation of > DEV_RX_OFFLOAD_VLAN_EXTEND > > > offload? Does not look like it is documented. > > > > > > Looks like it is very specific to Intel controllers, Based on 82599 > > > HRM, it is following, not sure what is the real expectation from NIC > > > in normative terms. > > > > > > Extended VLAN. > > > ------------- > > > When set, all incoming Rx packets are expected to have at least one > > > VLAN with the Ether type as defined in EXVET register. The packets > > > can have an inner-VLAN that should be used for all filtering > > > purposes. All Tx packets are expected to have at least one VLAN > > > added to them by the host. In the case of an additional VLAN request > > > (VLE), the inner-VLAN is added by the hardware after the outer-VLAN i= s > added by the host. > > > This bit should only be reset by a PCIe reset and should only be > > > changed while Tx and Rx processes are stopped. > > > The exception to this rule are MAC control packets such as flow > > > control, 802.1x, LACP, etc. that never carry a VLAN tag of any type > > > > > > > This looks similar to QinQ but it seems not, in ixgbe datasheet it has: >=20 > Yes. QinQ there is an already an offload called > DEV_RX_OFFLOAD_QINQ_STRIP Excuse me, I have some thought, is that right? maybe DEV_RX_OFFLOAD_QINQ_STRIP and DEV_RX_OFFLOAD_VLAN_EXTEND is just two = thing that play a different role each. DEV_RX_OFFLOAD_VLAN_EXTEND tell NIC to recognize QinQ PACKETS, it is a filt= er for NIC. DEV_RX_OFFLOAD_QINQ_STRIP tell nic to strip 2 inner and outer vlan head whe= n moving packets from nic to host memory. I40e NIC is the normative terms when handling qinq packets. >=20 >=20 > > > > " > > Double VLAN and Single VLAN Support > > ----------------------------------- > > <....> > > This mode is used for systems where the near end switch adds the > > outer VLAN header containing switching information. > > <...> > > " > > > > And it in this mode hw doesn't insert or strip the outer VLAN, it > > expect SW does it. The ethernet type is not 0x88A8 but can be anything > > set on EXVET.VET_EXT. So looks like it is to let switch to add custom V= LAN > tags and NIC to ignore them.