From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id F3819A00E6 for ; Fri, 9 Aug 2019 05:25:44 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2FA9A29C6; Fri, 9 Aug 2019 05:25:44 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id B3D0728EE; Fri, 9 Aug 2019 05:25:40 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2019 20:25:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,364,1559545200"; d="scan'208";a="326512440" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga004.jf.intel.com with ESMTP; 08 Aug 2019 20:25:39 -0700 Received: from shsmsx153.ccr.corp.intel.com (10.239.6.53) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 8 Aug 2019 20:25:38 -0700 Received: from shsmsx105.ccr.corp.intel.com ([169.254.11.15]) by SHSMSX153.ccr.corp.intel.com ([169.254.12.215]) with mapi id 14.03.0439.000; Fri, 9 Aug 2019 11:25:36 +0800 From: "Zhang, Xiao" To: "Xing, Beilei" , "dev@dpdk.org" CC: "Zhang, Qi Z" , "stable@dpdk.org" Thread-Topic: [v2] net/i40e: fix vf runtime queues rss config Thread-Index: AQHVTGmqkjvcLHz6BUeXoYeJQkACnqbw8T6AgACoiQCAAJDxwA== Date: Fri, 9 Aug 2019 03:25:36 +0000 Message-ID: References: <1565136542-7652-1-git-send-email-xiao.zhang@intel.com> <1565282473-35661-1-git-send-email-xiao.zhang@intel.com> <94479800C636CB44BD422CB454846E013CE222D5@SHSMSX101.ccr.corp.intel.com> In-Reply-To: <94479800C636CB44BD422CB454846E013CE222D5@SHSMSX101.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [v2] net/i40e: fix vf runtime queues rss config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Xing, Beilei > Sent: Friday, August 9, 2019 10:44 AM > To: Zhang, Xiao ; dev@dpdk.org > Cc: Zhang, Qi Z ; stable@dpdk.org > Subject: RE: [v2] net/i40e: fix vf runtime queues rss config >=20 >=20 > > -----Original Message----- > > From: Zhang, Xiao > > Sent: Friday, August 9, 2019 12:41 AM > > To: dev@dpdk.org > > Cc: Xing, Beilei ; Zhang, Qi Z > > ; Zhang, Xiao ; > > stable@dpdk.org > > Subject: [v2] net/i40e: fix vf runtime queues rss config > > > > I40evf queue can not work properly with kernel pf driver. Eg. when > > configure > > 8 queues pair, only 4 queues can receive packets, and half packets > > will be lost if using 2 queues pair. > > This issue is caused by misconfiguration of look up table, use aq > > command to setup the lut to make it work properly. > > > > Fixes: cea7a51c1750 ("i40evf: support RSS") > > Cc: stable@dpdk.org > > > > Signed-off-by: Xiao Zhang > > --- > > v2 change for loop format to avoid build patch issue. > > --- > > drivers/net/i40e/i40e_ethdev_vf.c | 36 > > +++++++++++++++++++++++++++++--- > > ---- > > 1 file changed, 29 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/net/i40e/i40e_ethdev_vf.c > > b/drivers/net/i40e/i40e_ethdev_vf.c > > index 308fb98..2d3cf3e 100644 > > --- a/drivers/net/i40e/i40e_ethdev_vf.c > > +++ b/drivers/net/i40e/i40e_ethdev_vf.c > > @@ -2574,6 +2574,26 @@ i40evf_hw_rss_hash_set(struct i40e_vf *vf, > > struct rte_eth_rss_conf *rss_conf) > > if (ret) > > return ret; > > > > + if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) { > > + uint8_t *lut; > > + uint32_t rss_lut_size =3D (I40E_VFQF_HLUT1_MAX_INDEX + 1) * > > 4; > > + uint32_t i; > > + lut =3D rte_zmalloc("i40e_rss_lut", rss_lut_size, 0); > > + if (!lut) { > > + PMD_DRV_LOG(ERR, "No memory can be allocated"); > > + return -ENOMEM; > > + } > > + > > + for (i =3D 0; i < rss_lut_size; i++) > > + lut[i] =3D i % vf->num_queue_pairs; > > + > > + ret =3D i40evf_set_rss_lut(&vf->vsi, lut, > > + rss_lut_size); > > + rte_free(lut); > > + if (ret) > > + return ret; > > + } > > + >=20 > Why not moving the LUT configuration to the following i40evf_config_rss > function? Yes, it's better to move the above code to i40evf_config_rss since the lage= cy=20 LUT configuration is also there. It will be more clear. Thanks, Xiao >=20 > > hena =3D i40e_config_hena(vf->adapter, rss_conf->rss_hf); > > i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena); > > i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32)); > @@ > > -2607,13 +2627,15 @@ i40evf_config_rss(struct i40e_vf *vf) > > } > > > > num =3D RTE_MIN(vf->dev_data->nb_rx_queues, > > I40E_MAX_QP_NUM_PER_VF); > > - /* Fill out the look up table */ > > - for (i =3D 0, j =3D 0; i < nb_q; i++, j++) { > > - if (j >=3D num) > > - j =3D 0; > > - lut =3D (lut << 8) | j; > > - if ((i & 3) =3D=3D 3) > > - I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut); > > + if (!(vf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) { > > + /* Fill out the look up table */ > > + for (i =3D 0, j =3D 0; i < nb_q; i++, j++) { > > + if (j >=3D num) > > + j =3D 0; > > + lut =3D (lut << 8) | j; > > + if ((i & 3) =3D=3D 3) > > + I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> > > 2), lut); > > + } > > } > > > > rss_conf =3D vf->dev_data->dev_conf.rx_adv_conf.rss_conf; > > -- > > 2.7.4