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Thu, 21 Mar 2019 12:15:16 +0000 From: Shahaf Shuler To: Slava Ovsiienko , "dev@dpdk.org" Thread-Topic: [PATCH 14/14] net/mlx5: add source vport match to the ingress rules Thread-Index: AQHU373ahWqBWAolkE6SsDxba4lis6YV/mIw Date: Thu, 21 Mar 2019 12:15:16 +0000 Message-ID: References: <1551376985-11096-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-15-git-send-email-viacheslavo@mellanox.com> In-Reply-To: <1553155888-27498-15-git-send-email-viacheslavo@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=shahafs@mellanox.com; x-originating-ip: [31.154.10.105] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: a8ed62c7-28da-49a5-bbdd-08d6adf6e114 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020); 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: a8ed62c7-28da-49a5-bbdd-08d6adf6e114 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Mar 2019 12:15:16.7925 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR0502MB3636 Subject: Re: [dpdk-dev] [PATCH 14/14] net/mlx5: add source vport match to the ingress rules X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Mar 2019 12:15:25 -0000 Thursday, March 21, 2019 10:11 AM, Viacheslav Ovsiienko: > Subject: [PATCH 14/14] net/mlx5: add source vport match to the ingress ru= les >=20 > For E-Switch configurations over multiport Infiniband devices we should a= dd > source vport match to correctly distribute traffic between representors. >=20 > Signed-off-by: Viacheslav Ovsiienko > --- > drivers/net/mlx5/mlx5_flow_dv.c | 38 > ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 38 insertions(+) >=20 > diff --git a/drivers/net/mlx5/mlx5_flow_dv.c > b/drivers/net/mlx5/mlx5_flow_dv.c index b8943da..489b3bd 100644 > --- a/drivers/net/mlx5/mlx5_flow_dv.c > +++ b/drivers/net/mlx5/mlx5_flow_dv.c > @@ -3095,6 +3095,29 @@ struct field_modify_info modify_tcp[] =3D { } >=20 > /** > + * Add source vport match to the specified matcher. > + * > + * @param[in, out] matcher > + * Flow matcher. > + * @param[in, out] key > + * Flow matcher value. > + * @param[in] port > + * Source vport value to match > + * @param[in] mask > + * Mask > + */ > +static void > +flow_dv_translate_source_vport(void *matcher, void *key, > + int16_t port, uint16_t mask) > +{ > + void *misc_m =3D MLX5_ADDR_OF(fte_match_param, matcher, > misc_parameters); > + void *misc_v =3D MLX5_ADDR_OF(fte_match_param, key, > misc_parameters); > + > + MLX5_SET(fte_match_set_misc, misc_m, source_port, mask); > + MLX5_SET(fte_match_set_misc, misc_v, source_port, port); } > + > +/** > * Fill the flow with DV spec. > * > * @param[in] dev > @@ -3389,6 +3412,21 @@ struct field_modify_info modify_tcp[] =3D { > } > dev_flow->dv.actions_n =3D actions_n; > flow->actions =3D action_flags; > + if (attr->ingress && !attr->transfer && > + (priv->representor || priv->master)) { > + /* It was validated - we support unidirections flows only. */ > + assert(!attr->egress); > + /* > + * Add matching on source vport index only > + * for ingress rules in E-Switch configurations. > + */ > + flow_dv_translate_source_vport(matcher.mask.buf, > + dev_flow->dv.value.buf, > + priv->representor_id < 0 ? > + priv->representor_id : > + priv->representor_id + 1, The vport of representor_id 0 will be 1?=20 Who owns vport 0?=20 > + 0xffff); > + } > for (; items->type !=3D RTE_FLOW_ITEM_TYPE_END; items++) { > int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); > void *match_mask =3D matcher.mask.buf; > -- > 1.8.3.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 5A79CA00E6 for ; Thu, 21 Mar 2019 13:16:15 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5B6491B4C6; Thu, 21 Mar 2019 13:15:26 +0100 (CET) Received: from EUR01-HE1-obe.outbound.protection.outlook.com (mail-eopbgr130050.outbound.protection.outlook.com [40.107.13.50]) by dpdk.org (Postfix) with ESMTP id 278D51B4C0 for ; Thu, 21 Mar 2019 13:15:25 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=qnPYr097O3ZsPB/G1FjuLpZhgic+X2/ujPY7kNFjsGg=; b=JTBgKlTzDGy9aEQbCbXwiirnDLa12Yk23gBkw8q6hdDEtIRSlRgy5H8KSTN6sAbpmREe4foFRqaMxjgwvNBgCn7HFVifcGxRWJ9cAYapUwYn/VcMYCWq9/RKwniVbZvKyNQ7B0FTMj2Fa4VNcsPubHc1infjVpWNOJYnPuvNJek= Received: from AM0PR0502MB3795.eurprd05.prod.outlook.com (52.133.45.150) by AM0PR0502MB3636.eurprd05.prod.outlook.com (52.133.46.141) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1730.15; Thu, 21 Mar 2019 12:15:16 +0000 Received: from AM0PR0502MB3795.eurprd05.prod.outlook.com ([fe80::84f3:7e92:7a51:1003]) by AM0PR0502MB3795.eurprd05.prod.outlook.com ([fe80::84f3:7e92:7a51:1003%2]) with mapi id 15.20.1730.013; Thu, 21 Mar 2019 12:15:16 +0000 From: Shahaf Shuler To: Slava Ovsiienko , "dev@dpdk.org" Thread-Topic: [PATCH 14/14] net/mlx5: add source vport match to the ingress rules Thread-Index: AQHU373ahWqBWAolkE6SsDxba4lis6YV/mIw Date: Thu, 21 Mar 2019 12:15:16 +0000 Message-ID: References: <1551376985-11096-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-15-git-send-email-viacheslavo@mellanox.com> In-Reply-To: <1553155888-27498-15-git-send-email-viacheslavo@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=shahafs@mellanox.com; x-originating-ip: [31.154.10.105] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: a8ed62c7-28da-49a5-bbdd-08d6adf6e114 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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A:1; MX:3; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: Wk/kleZE6OsIfUDG5WLDTkjylWH9vJAcahAOtARwtF/q+e3hgLWsXnpYRvobmwDVIXAvyp6g5DLn12JQBFkNzNNDxF3M+Y4bGCs/aD78Q4aWm6TEuiLqbGGJbwxy0c0BBBETtgVIEuhGuBfqkpU1iUD7LinvdyPtAcI6a//y0cP5sq4RXiw+WHPrKu1uAkN6XBIFp5urQ+THvoo2PKvRFXSeA+u27DB2RD/CwJBlpFz6fohNcoxQaYd/cnZpEO4roQqKuXxTrNkOrLMmueU57dpCPAOb0oGMyoTjkrRZ0XG3mxbpvwRuCpUVuf5l18CLuwW0Uh9AKuu5NXn55g42I5CD7IDHwDc28kVFhx337XZYLAjD3q2boCe2SwGc2gLcQl5LDIMuT6kWo4TgPuSZT5WaVL96ky5HIuMe6vyxFSk= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: a8ed62c7-28da-49a5-bbdd-08d6adf6e114 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Mar 2019 12:15:16.7925 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR0502MB3636 Subject: Re: [dpdk-dev] [PATCH 14/14] net/mlx5: add source vport match to the ingress rules X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190321121516.KTwg7CpOYmAqGFIalVs-4OyvwZYOwCSl-xwy8hLgG6E@z> Thursday, March 21, 2019 10:11 AM, Viacheslav Ovsiienko: > Subject: [PATCH 14/14] net/mlx5: add source vport match to the ingress ru= les >=20 > For E-Switch configurations over multiport Infiniband devices we should a= dd > source vport match to correctly distribute traffic between representors. >=20 > Signed-off-by: Viacheslav Ovsiienko > --- > drivers/net/mlx5/mlx5_flow_dv.c | 38 > ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 38 insertions(+) >=20 > diff --git a/drivers/net/mlx5/mlx5_flow_dv.c > b/drivers/net/mlx5/mlx5_flow_dv.c index b8943da..489b3bd 100644 > --- a/drivers/net/mlx5/mlx5_flow_dv.c > +++ b/drivers/net/mlx5/mlx5_flow_dv.c > @@ -3095,6 +3095,29 @@ struct field_modify_info modify_tcp[] =3D { } >=20 > /** > + * Add source vport match to the specified matcher. > + * > + * @param[in, out] matcher > + * Flow matcher. > + * @param[in, out] key > + * Flow matcher value. > + * @param[in] port > + * Source vport value to match > + * @param[in] mask > + * Mask > + */ > +static void > +flow_dv_translate_source_vport(void *matcher, void *key, > + int16_t port, uint16_t mask) > +{ > + void *misc_m =3D MLX5_ADDR_OF(fte_match_param, matcher, > misc_parameters); > + void *misc_v =3D MLX5_ADDR_OF(fte_match_param, key, > misc_parameters); > + > + MLX5_SET(fte_match_set_misc, misc_m, source_port, mask); > + MLX5_SET(fte_match_set_misc, misc_v, source_port, port); } > + > +/** > * Fill the flow with DV spec. > * > * @param[in] dev > @@ -3389,6 +3412,21 @@ struct field_modify_info modify_tcp[] =3D { > } > dev_flow->dv.actions_n =3D actions_n; > flow->actions =3D action_flags; > + if (attr->ingress && !attr->transfer && > + (priv->representor || priv->master)) { > + /* It was validated - we support unidirections flows only. */ > + assert(!attr->egress); > + /* > + * Add matching on source vport index only > + * for ingress rules in E-Switch configurations. > + */ > + flow_dv_translate_source_vport(matcher.mask.buf, > + dev_flow->dv.value.buf, > + priv->representor_id < 0 ? > + priv->representor_id : > + priv->representor_id + 1, The vport of representor_id 0 will be 1?=20 Who owns vport 0?=20 > + 0xffff); > + } > for (; items->type !=3D RTE_FLOW_ITEM_TYPE_END; items++) { > int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); > void *match_mask =3D matcher.mask.buf; > -- > 1.8.3.1