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From: Shahaf Shuler <shahafs@mellanox.com>
To: Slava Ovsiienko <viacheslavo@mellanox.com>, "dev@dpdk.org" <dev@dpdk.org>
Thread-Topic: [PATCH v2 13/13] net/mlx5: add source vport match to the ingress
rules
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Date: Tue, 26 Mar 2019 12:21:06 +0000
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Subject: Re: [dpdk-dev] [PATCH v2 13/13] net/mlx5: add source vport match to
the ingress rules
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Monday, March 25, 2019 7:04 PM, Viacheslav Ovsiienko:
> Subject: [PATCH v2 13/13] net/mlx5: add source vport match to the ingress
> rules
>=20
> For E-Switch configurations over multiport Infiniband devices we should a=
dd
> source vport match to correctly distribute traffic between representors.
>=20
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> ---
> drivers/net/mlx5/mlx5_flow_dv.c | 36
> ++++++++++++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>=20
> diff --git a/drivers/net/mlx5/mlx5_flow_dv.c
> b/drivers/net/mlx5/mlx5_flow_dv.c index b8943da..67b359f 100644
> --- a/drivers/net/mlx5/mlx5_flow_dv.c
> +++ b/drivers/net/mlx5/mlx5_flow_dv.c
> @@ -3095,6 +3095,29 @@ struct field_modify_info modify_tcp[] =3D { }
>=20
> /**
> + * Add source vport match to the specified matcher.
> + *
> + * @param[in, out] matcher
> + * Flow matcher.
> + * @param[in, out] key
> + * Flow matcher value.
> + * @param[in] port
> + * Source vport value to match
> + * @param[in] mask
> + * Mask
> + */
> +static void
> +flow_dv_translate_source_vport(void *matcher, void *key,
> + int16_t port, uint16_t mask)
> +{
> + void *misc_m =3D MLX5_ADDR_OF(fte_match_param, matcher,
> misc_parameters);
> + void *misc_v =3D MLX5_ADDR_OF(fte_match_param, key,
> misc_parameters);
> +
> + MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
> + MLX5_SET(fte_match_set_misc, misc_v, source_port, port); }
> +
> +/**
> * Fill the flow with DV spec.
> *
> * @param[in] dev
> @@ -3389,6 +3412,19 @@ struct field_modify_info modify_tcp[] =3D {
> }
> dev_flow->dv.actions_n =3D actions_n;
> flow->actions =3D action_flags;
> + if (attr->ingress && !attr->transfer &&
> + (priv->representor || priv->master)) {
> + /* It was validated - we support unidirections flows only. */
> + assert(!attr->egress);
> + /*
> + * Add matching on source vport index only
> + * for ingress rules in E-Switch configurations.
> + */
> + flow_dv_translate_source_vport(matcher.mask.buf,
> + dev_flow->dv.value.buf,
> + priv->representor_id,
Overall looks OK apart from the override of the representor_id.=20
> + 0xffff);
> + }
> for (; items->type !=3D RTE_FLOW_ITEM_TYPE_END; items++) {
> int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
> void *match_mask =3D matcher.mask.buf;
> --
> 1.8.3.1
From mboxrd@z Thu Jan 1 00:00:00 1970
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From: Shahaf Shuler <shahafs@mellanox.com>
To: Slava Ovsiienko <viacheslavo@mellanox.com>, "dev@dpdk.org" <dev@dpdk.org>
Thread-Topic: [PATCH v2 13/13] net/mlx5: add source vport match to the ingress
rules
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Date: Tue, 26 Mar 2019 12:21:06 +0000
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Subject: Re: [dpdk-dev] [PATCH v2 13/13] net/mlx5: add source vport match to
the ingress rules
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Monday, March 25, 2019 7:04 PM, Viacheslav Ovsiienko:
> Subject: [PATCH v2 13/13] net/mlx5: add source vport match to the ingress
> rules
>=20
> For E-Switch configurations over multiport Infiniband devices we should a=
dd
> source vport match to correctly distribute traffic between representors.
>=20
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> ---
> drivers/net/mlx5/mlx5_flow_dv.c | 36
> ++++++++++++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>=20
> diff --git a/drivers/net/mlx5/mlx5_flow_dv.c
> b/drivers/net/mlx5/mlx5_flow_dv.c index b8943da..67b359f 100644
> --- a/drivers/net/mlx5/mlx5_flow_dv.c
> +++ b/drivers/net/mlx5/mlx5_flow_dv.c
> @@ -3095,6 +3095,29 @@ struct field_modify_info modify_tcp[] =3D { }
>=20
> /**
> + * Add source vport match to the specified matcher.
> + *
> + * @param[in, out] matcher
> + * Flow matcher.
> + * @param[in, out] key
> + * Flow matcher value.
> + * @param[in] port
> + * Source vport value to match
> + * @param[in] mask
> + * Mask
> + */
> +static void
> +flow_dv_translate_source_vport(void *matcher, void *key,
> + int16_t port, uint16_t mask)
> +{
> + void *misc_m =3D MLX5_ADDR_OF(fte_match_param, matcher,
> misc_parameters);
> + void *misc_v =3D MLX5_ADDR_OF(fte_match_param, key,
> misc_parameters);
> +
> + MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
> + MLX5_SET(fte_match_set_misc, misc_v, source_port, port); }
> +
> +/**
> * Fill the flow with DV spec.
> *
> * @param[in] dev
> @@ -3389,6 +3412,19 @@ struct field_modify_info modify_tcp[] =3D {
> }
> dev_flow->dv.actions_n =3D actions_n;
> flow->actions =3D action_flags;
> + if (attr->ingress && !attr->transfer &&
> + (priv->representor || priv->master)) {
> + /* It was validated - we support unidirections flows only. */
> + assert(!attr->egress);
> + /*
> + * Add matching on source vport index only
> + * for ingress rules in E-Switch configurations.
> + */
> + flow_dv_translate_source_vport(matcher.mask.buf,
> + dev_flow->dv.value.buf,
> + priv->representor_id,
Overall looks OK apart from the override of the representor_id.=20
> + 0xffff);
> + }
> for (; items->type !=3D RTE_FLOW_ITEM_TYPE_END; items++) {
> int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
> void *match_mask =3D matcher.mask.buf;
> --
> 1.8.3.1