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Tue, 7 Jan 2020 11:31:12 +0000 Received: from AM0PR05MB6707.eurprd05.prod.outlook.com ([fe80::95ff:bfb2:7f11:87b2]) by AM0PR05MB6707.eurprd05.prod.outlook.com ([fe80::95ff:bfb2:7f11:87b2%5]) with mapi id 15.20.2602.016; Tue, 7 Jan 2020 11:31:12 +0000 From: Raslan Darawsheh To: Matan Azrad , Slava Ovsiienko , "dev@dpdk.org" CC: Ori Kam , "stable@dpdk.org" Thread-Topic: [PATCH] net/mlx5: fix matcher metadata register c0 field setup Thread-Index: AQHVtwn1BROw4tXsTUq+A4WnVSHz1afd0zEAgAFag8A= Date: Tue, 7 Jan 2020 11:31:12 +0000 Message-ID: References: <1576828138-13063-1-git-send-email-viacheslavo@mellanox.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=rasland@mellanox.com; x-originating-ip: [212.29.221.74] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: 7b9f9303-df8f-47a7-a5f0-08d7936519b9 x-ms-traffictypediagnostic: AM0PR05MB4130:|AM0PR05MB4130: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7219; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7b9f9303-df8f-47a7-a5f0-08d7936519b9 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Jan 2020 11:31:12.7825 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: IkE6L845Dpm7l7jr1efc4kA/P+lVmAg8K6Ks44eUnkt4TNh4t0qlJXbjibGSqScn/+79euoJthp+MM7+lUSauA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR05MB4130 Subject: Re: [dpdk-dev] [PATCH] net/mlx5: fix matcher metadata register c0 field setup X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, > -----Original Message----- > From: Matan Azrad > Sent: Monday, January 6, 2020 4:50 PM > To: Slava Ovsiienko ; dev@dpdk.org > Cc: Raslan Darawsheh ; Ori Kam > ; stable@dpdk.org > Subject: RE: [PATCH] net/mlx5: fix matcher metadata register c0 field set= up >=20 >=20 >=20 > From: Viacheslav Ovsiienko > > The metadata register c0 field in the matcher might be split into two > > independent fields - the source vport index and META item value. These > > fields have no permanent assigned bits, the configuration is queried > > from the kernel drivers. > > > > MLX5_SET configures the specified 32-bit field as whole entity. > > For metadata register c0 we should take into account the provided mask > > in order to configure the specified subfield bits only. > > > > Fixes: acfcd5c52f94 ("net/mlx5: update meta register matcher set") > > Cc: stable@dpdk.org > > > > Signed-off-by: Viacheslav Ovsiienko > > --- > > drivers/net/mlx5/mlx5_flow_dv.c | 15 +++++++++++++-- > > 1 file changed, 13 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/net/mlx5/mlx5_flow_dv.c > > b/drivers/net/mlx5/mlx5_flow_dv.c index 4c16281..893db3e 100644 > > --- a/drivers/net/mlx5/mlx5_flow_dv.c > > +++ b/drivers/net/mlx5/mlx5_flow_dv.c > > @@ -5742,6 +5742,7 @@ struct field_modify_info modify_tcp[] =3D { > > MLX5_ADDR_OF(fte_match_param, matcher, > misc_parameters_2); > > void *misc2_v =3D > > MLX5_ADDR_OF(fte_match_param, key, > > misc_parameters_2); > > + uint32_t temp; > > > > data &=3D mask; > > switch (reg_type) { > > @@ -5754,8 +5755,18 @@ struct field_modify_info modify_tcp[] =3D { > > MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, > data); > > break; > > case REG_C_0: > > - MLX5_SET(fte_match_set_misc2, misc2_m, > > metadata_reg_c_0, mask); > > - MLX5_SET(fte_match_set_misc2, misc2_v, > > metadata_reg_c_0, data); > > + /* > > + * The metadata register C0 field might be divided into > > + * source vport index and META item value, we should set > > + * this field accorfing to specified mask, not as whole one. > > + */ >=20 > Typo - accorfing =3D> according. >=20 > > + temp =3D MLX5_GET(fte_match_set_misc2, misc2_m, > > metadata_reg_c_0); > > + temp |=3D mask; > > + MLX5_SET(fte_match_set_misc2, misc2_m, > > metadata_reg_c_0, temp); > > + temp =3D MLX5_GET(fte_match_set_misc2, misc2_v, > > metadata_reg_c_0); > > + temp &=3D ~mask; > > + temp |=3D data; > > + MLX5_SET(fte_match_set_misc2, misc2_v, > > metadata_reg_c_0, temp); > > break; > > case REG_C_1: > > MLX5_SET(fte_match_set_misc2, misc2_m, > metadata_reg_c_1, mask); >=20 > Raslan, please fix the typo in integration. > Acked-by: Matan Azrad >=20 Fixed typo issue and applied patch to next-net-mlx. =20 Kindest regards, Raslan Darawsheh