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From: Raslan Darawsheh <rasland@mellanox.com>
To: Slava Ovsiienko <viacheslavo@mellanox.com>,
	"dev@dpdk.org" <dev@dpdk.org>
Cc: Matan Azrad <matan@mellanox.com>, Ori Kam <orika@mellanox.com>,
	"stable@dpdk.org" <stable@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH] net/mlx5: fix metadata item endianness conversion
Date: Wed, 8 Jan 2020 09:03:32 +0000	[thread overview]
Message-ID: <AM0PR05MB67078FCC88FD284D957FE02EC23E0@AM0PR05MB6707.eurprd05.prod.outlook.com> (raw)
In-Reply-To: <1577197235-26433-1-git-send-email-viacheslavo@mellanox.com>

Hi,

> -----Original Message-----
> From: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> Sent: Tuesday, December 24, 2019 4:21 PM
> To: dev@dpdk.org
> Cc: Matan Azrad <matan@mellanox.com>; Raslan Darawsheh
> <rasland@mellanox.com>; Ori Kam <orika@mellanox.com>;
> stable@dpdk.org
> Subject: [PATCH] net/mlx5: fix metadata item endianness conversion
> 
> The metadata register c0 field in the matcher might be split into two
> independent fields - the source vport index and META item value. These
> fields have no permanent assigned bits, the configuration is queried from the
> kernel drivers.
> 
> It means the metadata item field might be less than 32 bits.
> Also, the metadata are engaged in datapath and there are no any metadata
> endianness conversions in datapath to provide the better performance, all
> conversions are implemented in rte_flow engine. If there are less than 32
> bits of metadata the extra right shift is needed after endianness conversion
> for little- endian hosts.
> 
> Fixes: acfcd5c52f94 ("net/mlx5: update meta register matcher set")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> ---
>  drivers/net/mlx5/mlx5_flow_dv.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_flow_dv.c
> b/drivers/net/mlx5/mlx5_flow_dv.c index f8e153c..cb416ca 100644
> --- a/drivers/net/mlx5/mlx5_flow_dv.c
> +++ b/drivers/net/mlx5/mlx5_flow_dv.c
> @@ -5903,8 +5903,12 @@ struct field_modify_info modify_tcp[] = {
>  			struct mlx5_priv *priv = dev->data->dev_private;
>  			uint32_t msk_c0 = priv->sh->dv_regc0_mask;
>  			uint32_t shl_c0 = rte_bsf32(msk_c0);
> +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> +			uint32_t shr_c0 = __builtin_clz(priv->sh-
> >dv_meta_mask);
> 
> -			msk_c0 = rte_cpu_to_be_32(msk_c0);
> +			value >>= shr_c0;
> +			mask >>= shr_c0;
> +#endif
>  			value <<= shl_c0;
>  			mask <<= shl_c0;
>  			assert(msk_c0);
> --
> 1.8.3.1


Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh

  parent reply	other threads:[~2020-01-08  9:03 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-24 14:20 Viacheslav Ovsiienko
2020-01-06 14:44 ` Matan Azrad
2020-01-08  9:03 ` Raslan Darawsheh [this message]
2020-01-17 14:59 ` [dpdk-dev] [PATCH v2] " Viacheslav Ovsiienko
2020-01-17 17:19   ` Ferruh Yigit

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