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Thu, 16 Jul 2020 20:20:23 +0000 Received: from AM0PR05MB6707.eurprd05.prod.outlook.com ([fe80::ecd3:6008:3784:4012]) by AM0PR05MB6707.eurprd05.prod.outlook.com ([fe80::ecd3:6008:3784:4012%5]) with mapi id 15.20.3174.026; Thu, 16 Jul 2020 20:20:23 +0000 From: Raslan Darawsheh To: Slava Ovsiienko , "dev@dpdk.org" CC: Matan Azrad , "olivier.matz@6wind.com" , Thomas Monjalon , "ferruh.yigit@intel.com" Thread-Topic: [PATCH v3 00/17] net/mlx5: introduce accurate packet Tx scheduling Thread-Index: AQHWW0pi48yenqfiUE6JcV/QJNT2AakKpmmw Date: Thu, 16 Jul 2020 20:20:23 +0000 Message-ID: References: <1591771085-24959-1-git-send-email-viacheslavo@mellanox.com> <1594887800-6563-1-git-send-email-viacheslavo@mellanox.com> In-Reply-To: <1594887800-6563-1-git-send-email-viacheslavo@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: mellanox.com; dkim=none (message not signed) header.d=none;mellanox.com; dmarc=none action=none header.from=mellanox.com; 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PTR:; CAT:NONE; SFTY:; SFS:(4636009)(366004)(136003)(39860400002)(376002)(346002)(396003)(55016002)(966005)(66556008)(83380400001)(7696005)(9686003)(4326008)(316002)(66446008)(71200400001)(33656002)(186003)(66946007)(64756008)(76116006)(86362001)(8676002)(26005)(8936002)(54906003)(110136005)(52536014)(6506007)(2906002)(5660300002)(66476007)(4743002)(478600001)(53546011); DIR:OUT; SFP:1101; x-ms-exchange-antispam-messagedata: rq7PZazeK+t+wjqA1cGfDFs4iM3enoHTU8+GiHdGAAkM9ic2Zsk8vF/Bm+oWTEkAXn6m+p0huv4ye/ieelM9wVAnDTZNrArFkBsZB4CPekBId/wu8K86ULFaTw90vE1zibmHkhc8lL5uP3IJ6f6TjFgpTXL9ZML/0QhFgGMhpWCerKHXB8zU+ukImiPEnlJ6q9eXWVlge4MTpu/buBcQPfbtBsDNmPXzXV4fLxbwprqOb0UwNa3XujXSaLyDcVNaWdezLyH9mUj97zPPV5KYyU0LxL1n/RANXK88p9N5r4xU1rPORI1Gch6AB6z0lmWHOJCTCM/Uh4o4/l9DdK7lW4C9kzpRw+cCC+WNeJtrIhg2TY2RX+SULOo/emrVPyltTdpINgmCgDHVGNpe4/cfJmHnC2m/T70dTlFZMC2835oAuiSDNN059j05YT7HKxraMoqhHfiQFvQYEadoO4IvCafrVivPspN2aTRU2qk9jfYX7fgWirMH1EGZqNIhBWA4 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM0PR05MB6707.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d858c9c8-3f41-43a8-6966-08d829c5ab86 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 Jul 2020 20:20:23.4370 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: xz2RMGuRZP1MSz3e31s7RTzZnFRw1MEp2CrtNizet7ozHKLh3IuiCfQFf5miXjdu13nvEPb9GXzjFqyJuKx7JA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR05MB3458 Subject: Re: [dpdk-dev] [PATCH v3 00/17] net/mlx5: introduce accurate packet Tx scheduling X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, > -----Original Message----- > From: Viacheslav Ovsiienko > Sent: Thursday, July 16, 2020 11:23 AM > To: dev@dpdk.org > Cc: Matan Azrad ; Raslan Darawsheh > ; olivier.matz@6wind.com; Thomas Monjalon > ; ferruh.yigit@intel.com > Subject: [PATCH v3 00/17] net/mlx5: introduce accurate packet Tx scheduli= ng >=20 > The accurate packet Tx scheduling on timestamps was introduced [1]. > This patchset provides the feature implementation on mlx5 PMD side. >=20 > [1] http://patches.dpdk.org/patch/73742/ >=20 > Signed-off-by: Viacheslav Ovsiienko > Acked-by: Matan Azrad >=20 > --- > v3: - 32-bit systems rte_atomic128_cmp_exchange() fix > - strncpy coverity issue (bug)fix > - codestyle compilation issues > - negative tx_pp is always enabled >=20 > Viacheslav Ovsiienko (17): > common/mlx5: update common part to support packet pacing > net/mlx5: introduce send scheduling devargs > net/mlx5: fix UAR lock sharing for multiport devices > net/mlx5: introduce shared UAR resource > net/mlx5: create clock queue for packet pacing > net/mlx5: create rearm queue for packet pacing > net/mlx5: create Tx queues with DevX > net/mlx5: allocate packet pacing context > net/mlx5: introduce clock queue service routine > net/mlx5: prepare Tx queue structures to support timestamp > net/mlx5: convert timestamp to completion index > net/mlx5: prepare Tx datapath to support sheduling > net/mlx5: add scheduling support to send routine template > net/mlx5: add read device clock support > net/mlx5: provide the send scheduling error statistics > common/mlx5: add register access DevX routine > net/mlx5: convert Rx timestamps in realtime format >=20 > doc/guides/nics/mlx5.rst | 37 + > drivers/common/mlx5/Makefile | 25 + > drivers/common/mlx5/linux/meson.build | 10 + > drivers/common/mlx5/linux/mlx5_glue.c | 31 +- > drivers/common/mlx5/linux/mlx5_glue.h | 5 + > drivers/common/mlx5/mlx5_devx_cmds.c | 79 +- > drivers/common/mlx5/mlx5_devx_cmds.h | 13 + > drivers/common/mlx5/mlx5_prm.h | 121 +- > drivers/common/mlx5/rte_common_mlx5_version.map | 1 + > drivers/net/mlx5/Makefile | 1 + > drivers/net/mlx5/linux/mlx5_os.c | 97 +- > drivers/net/mlx5/meson.build | 1 + > drivers/net/mlx5/mlx5.c | 61 +- > drivers/net/mlx5/mlx5.h | 90 +- > drivers/net/mlx5/mlx5_defs.h | 11 + > drivers/net/mlx5/mlx5_rxq.c | 26 +- > drivers/net/mlx5/mlx5_rxtx.c | 373 ++++++- > drivers/net/mlx5/mlx5_rxtx.h | 97 ++ > drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 34 +- > drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 54 +- > drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 34 +- > drivers/net/mlx5/mlx5_stats.c | 7 +- > drivers/net/mlx5/mlx5_trigger.c | 26 +- > drivers/net/mlx5/mlx5_txpp.c | 1335 > +++++++++++++++++++++++ > drivers/net/mlx5/mlx5_txq.c | 342 +++++- > 25 files changed, 2802 insertions(+), 109 deletions(-) > create mode 100644 drivers/net/mlx5/mlx5_txpp.c >=20 > -- > 1.8.3.1 Series applied to next-net-mlx, Kindest regards, Raslan Darawsheh