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Mon, 25 Mar 2019 09:18:12 +0000 From: "Joyce Kong (Arm Technology China)" To: "Ananyev, Konstantin" , "dev@dpdk.org" CC: nd , "jerinj@marvell.com" , "chaozhu@linux.vnet.ibm.com" , "Richardson, Bruce" , "thomas@monjalon.net" , "hemant.agrawal@nxp.com" , Honnappa Nagarahalli , "Gavin Hu (Arm Technology China)" Thread-Topic: [PATCH v4 1/3] rwlock: reimplement with atomic builtins Thread-Index: AQHU4BaBBWtsAEWN3kKiYsX5wOeAyqYcFwUg Date: Mon, 25 Mar 2019 09:18:12 +0000 Message-ID: References: <1544672265-219262-2-git-send-email-joyce.kong@arm.com> <1553063109-57574-2-git-send-email-joyce.kong@arm.com> <2601191342CEEE43887BDE71AB977258013655E71E@irsmsx105.ger.corp.intel.com> In-Reply-To: <2601191342CEEE43887BDE71AB977258013655E71E@irsmsx105.ger.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Joyce.Kong@arm.com; x-originating-ip: [113.29.88.7] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 8fbeb15f-ecb6-41b3-3e18-08d6b102cde5 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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DIR:OUT; SFP:1101; SCL:1; SRVR:AM0PR08MB3602; H:AM0PR08MB3587.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: DXStLAyRL2YqvL7mr1r3ykCcvECiuz49Sxx7+dGP1uHHRG7vovAqGEXU6bmaCg8Nu1JJQAeDLd62tHCumC4lq7okxWqaFhuHTpHKt9SPh0/C5tNh8EXPehRFRRh7UI/gd5aNRZ83Tfv4r41e3wC3mdBTBSU1rGfpzGn2WgvNbdUiWOaNIbsFbnVLnMmkKCeeIMyi13esz7oXffy6DlSeDmpq39nlDzBJizUyFzNexduJ6CLd+jcyMmAXDG8HSb0pJdfU0hRkOXqcdT0HwN53kJK+59e1ZqzQe1d1BR6G+UIQfoHqXbpi4fNYH/2A7/+c/yS2j1D2V9iLL5gzhsluZoOzhNQTZ3T2MksWQcVCLFr5fTqEG0mNu9XXbfKbQzwfAYoIbbLK52ZxBuAh2mDgdnndXk09bc/eW9VYgNiZq48= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8fbeb15f-ecb6-41b3-3e18-08d6b102cde5 X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Mar 2019 09:18:12.1347 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR08MB3602 Subject: Re: [dpdk-dev] [PATCH v4 1/3] rwlock: reimplement with atomic builtins X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 25 Mar 2019 09:18:13 -0000 Hi Konstantin, > -----Original Message----- > From: Ananyev, Konstantin > Sent: Friday, March 22, 2019 2:43 AM > To: Joyce Kong (Arm Technology China) ; > dev@dpdk.org > Cc: nd ; jerinj@marvell.com; chaozhu@linux.vnet.ibm.com; > Richardson, Bruce ; thomas@monjalon.net; > hemant.agrawal@nxp.com; Honnappa Nagarahalli > ; Gavin Hu (Arm Technology China) > > Subject: RE: [PATCH v4 1/3] rwlock: reimplement with atomic builtins >=20 >=20 >=20 > > -----Original Message----- > > From: Joyce Kong [mailto:joyce.kong@arm.com] > > Sent: Wednesday, March 20, 2019 6:25 AM > > To: dev@dpdk.org > > Cc: nd@arm.com; jerinj@marvell.com; Ananyev, Konstantin > > ; chaozhu@linux.vnet.ibm.com; > > Richardson, Bruce ; thomas@monjalon.net; > > hemant.agrawal@nxp.com; honnappa.nagarahalli@arm.com; > gavin.hu@arm.com > > Subject: [PATCH v4 1/3] rwlock: reimplement with atomic builtins > > > > The __sync builtin based implementation generates full memory barriers > > ('dmb ish') on Arm platforms. Using C11 atomic builtins to generate > > one way barriers. > > > > Here is the assembly code of __sync_compare_and_swap builtin. > > __sync_bool_compare_and_swap(dst, exp, src); > > 0x000000000090f1b0 <+16>: e0 07 40 f9 ldr x0, [sp, #8] > > 0x000000000090f1b4 <+20>: e1 0f 40 79 ldrh w1, [sp, #6] > > 0x000000000090f1b8 <+24>: e2 0b 40 79 ldrh w2, [sp, #4] > > 0x000000000090f1bc <+28>: 21 3c 00 12 and w1, w1, #0xffff > > 0x000000000090f1c0 <+32>: 03 7c 5f 48 ldxrh w3, [x0] > > 0x000000000090f1c4 <+36>: 7f 00 01 6b cmp w3, w1 > > 0x000000000090f1c8 <+40>: 61 00 00 54 b.ne 0x90f1d4 > > // b.any > > 0x000000000090f1cc <+44>: 02 fc 04 48 stlxrh w4, w2, [x0] > > 0x000000000090f1d0 <+48>: 84 ff ff 35 cbnz w4, 0x90f1c0 > > > > 0x000000000090f1d4 <+52>: bf 3b 03 d5 dmb ish > > 0x000000000090f1d8 <+56>: e0 17 9f 1a cset w0, eq // eq =3D n= one > > > > Signed-off-by: Gavin Hu > > Signed-off-by: Joyce Kong > > Tested-by: Joyce Kong > > Acked-by: Jerin Jacob > > --- > > lib/librte_eal/common/include/generic/rte_rwlock.h | 29 > > +++++++++++----------- > > 1 file changed, 15 insertions(+), 14 deletions(-) > > > > diff --git a/lib/librte_eal/common/include/generic/rte_rwlock.h > > b/lib/librte_eal/common/include/generic/rte_rwlock.h > > index b05d85a..de94ca9 100644 > > --- a/lib/librte_eal/common/include/generic/rte_rwlock.h > > +++ b/lib/librte_eal/common/include/generic/rte_rwlock.h > > @@ -64,14 +64,14 @@ rte_rwlock_read_lock(rte_rwlock_t *rwl) > > int success =3D 0; > > > > while (success =3D=3D 0) { > > - x =3D rwl->cnt; > > + x =3D __atomic_load_n(&rwl->cnt, __ATOMIC_RELAXED); > > /* write lock is held */ > > if (x < 0) { > > rte_pause(); > > continue; > > } > > - success =3D rte_atomic32_cmpset((volatile uint32_t *)&rwl->cnt, > > - (uint32_t)x, (uint32_t)(x + 1)); > > + success =3D __atomic_compare_exchange_n(&rwl->cnt, &x, x+1, > 1, >=20 > As a nit, here and in trylock: 'x+1' spaces missing, needs to be 'x + 1'. Change to 'x + 1' in v5. > Apart from that: > Acked-by: Konstantin Ananyev >=20 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 31015A05D3 for ; Mon, 25 Mar 2019 10:18:16 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5819D2BFA; Mon, 25 Mar 2019 10:18:15 +0100 (CET) Received: from EUR01-HE1-obe.outbound.protection.outlook.com (mail-eopbgr130040.outbound.protection.outlook.com [40.107.13.40]) by dpdk.org (Postfix) with ESMTP id 5ED132BF7 for ; Mon, 25 Mar 2019 10:18:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/tY8i5RzbS615B4DdpJxIEB4aX4+WSppVV0qP239LwM=; b=DceIvDhzyU7k5Cm0Rg4Ke5aE6Ag3ZAYHQLRBPOlrazjBd8+5LVRMTEIUfk3rHo701NllcyMxaBsqgVvFs7ZtIFAT2jrB7XzOvEMSFtQrlXkfWqfVfWwp8FTiInH47z6Ey1VXQLWiJJvQ6pdV4vLPeQJ/LCtjPN362NpQwjfuk7s= Received: from AM0PR08MB3587.eurprd08.prod.outlook.com (20.177.110.157) by AM0PR08MB3602.eurprd08.prod.outlook.com (20.177.109.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1730.16; Mon, 25 Mar 2019 09:18:12 +0000 Received: from AM0PR08MB3587.eurprd08.prod.outlook.com ([fe80::455f:1485:fda2:e120]) by AM0PR08MB3587.eurprd08.prod.outlook.com ([fe80::455f:1485:fda2:e120%2]) with mapi id 15.20.1730.019; Mon, 25 Mar 2019 09:18:12 +0000 From: "Joyce Kong (Arm Technology China)" To: "Ananyev, Konstantin" , "dev@dpdk.org" CC: nd , "jerinj@marvell.com" , "chaozhu@linux.vnet.ibm.com" , "Richardson, Bruce" , "thomas@monjalon.net" , "hemant.agrawal@nxp.com" , Honnappa Nagarahalli , "Gavin Hu (Arm Technology China)" Thread-Topic: [PATCH v4 1/3] rwlock: reimplement with atomic builtins Thread-Index: AQHU4BaBBWtsAEWN3kKiYsX5wOeAyqYcFwUg Date: Mon, 25 Mar 2019 09:18:12 +0000 Message-ID: References: <1544672265-219262-2-git-send-email-joyce.kong@arm.com> <1553063109-57574-2-git-send-email-joyce.kong@arm.com> <2601191342CEEE43887BDE71AB977258013655E71E@irsmsx105.ger.corp.intel.com> In-Reply-To: <2601191342CEEE43887BDE71AB977258013655E71E@irsmsx105.ger.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Joyce.Kong@arm.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:AM0PR08MB3602; H:AM0PR08MB3587.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: DXStLAyRL2YqvL7mr1r3ykCcvECiuz49Sxx7+dGP1uHHRG7vovAqGEXU6bmaCg8Nu1JJQAeDLd62tHCumC4lq7okxWqaFhuHTpHKt9SPh0/C5tNh8EXPehRFRRh7UI/gd5aNRZ83Tfv4r41e3wC3mdBTBSU1rGfpzGn2WgvNbdUiWOaNIbsFbnVLnMmkKCeeIMyi13esz7oXffy6DlSeDmpq39nlDzBJizUyFzNexduJ6CLd+jcyMmAXDG8HSb0pJdfU0hRkOXqcdT0HwN53kJK+59e1ZqzQe1d1BR6G+UIQfoHqXbpi4fNYH/2A7/+c/yS2j1D2V9iLL5gzhsluZoOzhNQTZ3T2MksWQcVCLFr5fTqEG0mNu9XXbfKbQzwfAYoIbbLK52ZxBuAh2mDgdnndXk09bc/eW9VYgNiZq48= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8fbeb15f-ecb6-41b3-3e18-08d6b102cde5 X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Mar 2019 09:18:12.1347 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR08MB3602 Subject: Re: [dpdk-dev] [PATCH v4 1/3] rwlock: reimplement with atomic builtins X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190325091812.9dlCXBrf2omoMt0VRSFqpu_TLcHzqkXCwIMR4xL3akk@z> Hi Konstantin, > -----Original Message----- > From: Ananyev, Konstantin > Sent: Friday, March 22, 2019 2:43 AM > To: Joyce Kong (Arm Technology China) ; > dev@dpdk.org > Cc: nd ; jerinj@marvell.com; chaozhu@linux.vnet.ibm.com; > Richardson, Bruce ; thomas@monjalon.net; > hemant.agrawal@nxp.com; Honnappa Nagarahalli > ; Gavin Hu (Arm Technology China) > > Subject: RE: [PATCH v4 1/3] rwlock: reimplement with atomic builtins >=20 >=20 >=20 > > -----Original Message----- > > From: Joyce Kong [mailto:joyce.kong@arm.com] > > Sent: Wednesday, March 20, 2019 6:25 AM > > To: dev@dpdk.org > > Cc: nd@arm.com; jerinj@marvell.com; Ananyev, Konstantin > > ; chaozhu@linux.vnet.ibm.com; > > Richardson, Bruce ; thomas@monjalon.net; > > hemant.agrawal@nxp.com; honnappa.nagarahalli@arm.com; > gavin.hu@arm.com > > Subject: [PATCH v4 1/3] rwlock: reimplement with atomic builtins > > > > The __sync builtin based implementation generates full memory barriers > > ('dmb ish') on Arm platforms. Using C11 atomic builtins to generate > > one way barriers. > > > > Here is the assembly code of __sync_compare_and_swap builtin. > > __sync_bool_compare_and_swap(dst, exp, src); > > 0x000000000090f1b0 <+16>: e0 07 40 f9 ldr x0, [sp, #8] > > 0x000000000090f1b4 <+20>: e1 0f 40 79 ldrh w1, [sp, #6] > > 0x000000000090f1b8 <+24>: e2 0b 40 79 ldrh w2, [sp, #4] > > 0x000000000090f1bc <+28>: 21 3c 00 12 and w1, w1, #0xffff > > 0x000000000090f1c0 <+32>: 03 7c 5f 48 ldxrh w3, [x0] > > 0x000000000090f1c4 <+36>: 7f 00 01 6b cmp w3, w1 > > 0x000000000090f1c8 <+40>: 61 00 00 54 b.ne 0x90f1d4 > > // b.any > > 0x000000000090f1cc <+44>: 02 fc 04 48 stlxrh w4, w2, [x0] > > 0x000000000090f1d0 <+48>: 84 ff ff 35 cbnz w4, 0x90f1c0 > > > > 0x000000000090f1d4 <+52>: bf 3b 03 d5 dmb ish > > 0x000000000090f1d8 <+56>: e0 17 9f 1a cset w0, eq // eq =3D n= one > > > > Signed-off-by: Gavin Hu > > Signed-off-by: Joyce Kong > > Tested-by: Joyce Kong > > Acked-by: Jerin Jacob > > --- > > lib/librte_eal/common/include/generic/rte_rwlock.h | 29 > > +++++++++++----------- > > 1 file changed, 15 insertions(+), 14 deletions(-) > > > > diff --git a/lib/librte_eal/common/include/generic/rte_rwlock.h > > b/lib/librte_eal/common/include/generic/rte_rwlock.h > > index b05d85a..de94ca9 100644 > > --- a/lib/librte_eal/common/include/generic/rte_rwlock.h > > +++ b/lib/librte_eal/common/include/generic/rte_rwlock.h > > @@ -64,14 +64,14 @@ rte_rwlock_read_lock(rte_rwlock_t *rwl) > > int success =3D 0; > > > > while (success =3D=3D 0) { > > - x =3D rwl->cnt; > > + x =3D __atomic_load_n(&rwl->cnt, __ATOMIC_RELAXED); > > /* write lock is held */ > > if (x < 0) { > > rte_pause(); > > continue; > > } > > - success =3D rte_atomic32_cmpset((volatile uint32_t *)&rwl->cnt, > > - (uint32_t)x, (uint32_t)(x + 1)); > > + success =3D __atomic_compare_exchange_n(&rwl->cnt, &x, x+1, > 1, >=20 > As a nit, here and in trylock: 'x+1' spaces missing, needs to be 'x + 1'. Change to 'x + 1' in v5. > Apart from that: > Acked-by: Konstantin Ananyev >=20