From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR01-VE1-obe.outbound.protection.outlook.com (mail-ve1eur01on0052.outbound.protection.outlook.com [104.47.1.52]) by dpdk.org (Postfix) with ESMTP id B3D051C7D6 for ; Wed, 4 Apr 2018 18:10:37 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=rkk3QjlYky+bd2D1CMP9N48evQC2s6SOMG5eRcCDSYk=; b=gJQOcOP+cOWAVa2w476vBqopjtXH4sNbL4Mmwdmh9NVw1uDOQ3rXP6qXnTkOD37u3OF2rWa6xYxNypz8/+Kxr4gZ+W3KypQ9K4pSGB/keedj2pji9nZ/mJxvDJ8Lmpc8BxqFYDKDouFxhfUnLw5q2LXZbWYHGg1dnMuD1p8kFkw= Received: from AM4PR0501MB2657.eurprd05.prod.outlook.com (10.172.215.19) by AM4PR0501MB2305.eurprd05.prod.outlook.com (10.165.82.146) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.653.12; Wed, 4 Apr 2018 16:10:36 +0000 Received: from AM4PR0501MB2657.eurprd05.prod.outlook.com ([fe80::6885:c169:afcb:37e6]) by AM4PR0501MB2657.eurprd05.prod.outlook.com ([fe80::6885:c169:afcb:37e6%7]) with mapi id 15.20.0653.012; Wed, 4 Apr 2018 16:10:36 +0000 From: Matan Azrad To: Pavan Nikhilesh , "jerin.jacob@caviumnetworks.com" , "keith.wiles@intel.com" , Thomas Monjalon CC: "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v3 1/2] eal: add API to align integer to previous power of 2 Thread-Index: AQHTy/4PDze0s6BzekuJxdjllw+CNqPwxeaQ Date: Wed, 4 Apr 2018 16:10:36 +0000 Message-ID: References: <20180217104934.17291-1-pbhagavatula@caviumnetworks.com> <20180404101606.5156-1-pbhagavatula@caviumnetworks.com> In-Reply-To: <20180404101606.5156-1-pbhagavatula@caviumnetworks.com> Accept-Language: en-US, he-IL Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=matan@mellanox.com; x-originating-ip: [85.64.136.190] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; AM4PR0501MB2305; 7:77ARBtmRhiO4S/m0/2GXLfd+StuRTxLINwE5wF/NJMDutIoPUdHmZRyD8RU6qiWHjEVgskeBbWlEsb2J20mvd6jE3+CJ9ohi2Wl3fpXefEhRUlHe5ft5795+5M2HVfw+t4CT2kW7ywQYc8znEd7iYo+k7j19Ct1W1xQAVSYlT5UT3Q3qJ1tebSeimioHOfYYIE76g+duIiwTxsbgW54Bqo8nrdGFnJiUsZA7ahzJ9cH6ruKnxjwurilIgzZQtkHW x-ms-exchange-antispam-srfa-diagnostics: SOS; x-ms-office365-filtering-correlation-id: 46613d95-bc8e-4231-0160-08d59a469a02 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: UriScan:; BCL:0; PCL:0; RULEID:(7020095)(4652020)(5600026)(4604075)(3008032)(48565401081)(4534165)(4627221)(201703031133081)(201702281549075)(2017052603328)(7153060)(7193020); SRVR:AM4PR0501MB2305; x-ms-traffictypediagnostic: AM4PR0501MB2305: x-ld-processed: a652971c-7d2e-4d9b-a6a4-d149256f461b,ExtAddr x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(8211001083)(6040522)(2401047)(5005006)(8121501046)(10201501046)(93006095)(93001095)(3002001)(3231221)(944501327)(52105095)(6055026)(6041310)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123560045)(20161123564045)(20161123558120)(20161123562045)(6072148)(201708071742011); SRVR:AM4PR0501MB2305; BCL:0; PCL:0; RULEID:; SRVR:AM4PR0501MB2305; x-forefront-prvs: 0632519F33 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(366004)(39860400002)(396003)(346002)(376002)(39380400002)(199004)(189003)(86362001)(3846002)(3660700001)(6116002)(8676002)(446003)(4326008)(11346002)(106356001)(3280700002)(2906002)(25786009)(478600001)(5660300001)(53936002)(476003)(99286004)(6436002)(76176011)(486006)(6506007)(2201001)(55016002)(6246003)(7696005)(14454004)(8936002)(33656002)(5250100002)(316002)(305945005)(2501003)(9686003)(7736002)(229853002)(81166006)(81156014)(105586002)(102836004)(186003)(2900100001)(97736004)(66066001)(74316002)(110136005)(26005)(68736007)(357404004); DIR:OUT; SFP:1101; SCL:1; SRVR:AM4PR0501MB2305; H:AM4PR0501MB2657.eurprd05.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: 2drPbVr52twdJXhO+5yE6S5Nlzl0aiSGdePB/OU3+aPXV0n+mgr538DCY7BecAVWYi6h59zJ+8CmM+LIep1UWvDAILM3Zr4T76VnIp+Z3Dah7mi6872mKgt/EU4wHYO8khSuudFRWwcv88CIQTuN00wi2+oudPAc9T4RtfSid3XWZxwvTP8bqEXIl1qeiC+cQU32aRas0YXxKKj5hwYRbBtGNG7SQOM6mt/x7RalselGFa6lTAAwe/09MTcf09n2y9/muj6UkOeWHMu0tJBNCET3TUP+Fxaa9GWHEPk0GHeADdjC6o/zRnFzQ0nukowh4hrQx/RnxqnQJ0QR4NeUANZu3AMBmYe4vQGqP5pCSKsZXFX42IrfYufhT9MlIWetdKQN+yMEj6A71uRMYtrfgC3P51RLFq8at1Nvs78SsyU= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 46613d95-bc8e-4231-0160-08d59a469a02 X-MS-Exchange-CrossTenant-originalarrivaltime: 04 Apr 2018 16:10:36.3754 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR0501MB2305 Subject: Re: [dpdk-dev] [PATCH v3 1/2] eal: add API to align integer to previous power of 2 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 Apr 2018 16:10:38 -0000 Hi Pavan Shouldn't the new APIs be tagged with the experimental tag as agreed? Besides that, Acked-by: Matan Azrad From: Pavan Nikhilesh, Wednesday, April 4, 2018 1:16 PM > Add 32b and 64b API's to align the given integer to the previous power of= 2. >=20 > Signed-off-by: Pavan Nikhilesh > --- > v3 Changes: > - Move commonly used code to rte_combine(32/64)ms1b so that it can be > reused. >=20 > v2 Changes: > - Modified api name to `rte_align(32/64)prevpow2` from > `rte_align(32/64)lowpow2`. > - corrected fuction to return if the integer is already aligned to powe= r of 2. >=20 > lib/librte_eal/common/include/rte_common.h | 92 > ++++++++++++++++++++++++++---- > 1 file changed, 81 insertions(+), 11 deletions(-) >=20 > diff --git a/lib/librte_eal/common/include/rte_common.h > b/lib/librte_eal/common/include/rte_common.h > index c7803e41c..7e147dcf2 100644 > --- a/lib/librte_eal/common/include/rte_common.h > +++ b/lib/librte_eal/common/include/rte_common.h > @@ -223,6 +223,51 @@ extern int RTE_BUILD_BUG_ON_detected_error; } > while(0) #endif >=20 > +/** > + * Combines 32b inputs most significant set bits into the least > + * significant bits to construct a value with the same MSBs as x > + * but all 1's under it. > + * > + * @param x > + * The integer whose MSBs need to be combined with its LSBs > + * @return > + * The combined value. > + */ > +static inline uint32_t > +rte_combine32ms1b(register uint32_t x) > +{ > + x |=3D x >> 1; > + x |=3D x >> 2; > + x |=3D x >> 4; > + x |=3D x >> 8; > + x |=3D x >> 16; > + > + return x; > +} > + > +/** > + * Combines 64b inputs most significant set bits into the least > + * significant bits to construct a value with the same MSBs as x > + * but all 1's under it. > + * > + * @param v > + * The integer whose MSBs need to be combined with its LSBs > + * @return > + * The combined value. > + */ > +static inline uint64_t > +rte_combine64ms1b(register uint64_t v) > +{ > + v |=3D v >> 1; > + v |=3D v >> 2; > + v |=3D v >> 4; > + v |=3D v >> 8; > + v |=3D v >> 16; > + v |=3D v >> 32; > + > + return v; > +} > + > /*********** Macros to work with powers of 2 ********/ >=20 > /** > @@ -250,15 +295,28 @@ static inline uint32_t rte_align32pow2(uint32_t x)= { > x--; > - x |=3D x >> 1; > - x |=3D x >> 2; > - x |=3D x >> 4; > - x |=3D x >> 8; > - x |=3D x >> 16; > + x =3D rte_combine32ms1b(x); >=20 > return x + 1; > } >=20 > +/** > + * Aligns input parameter to the previous power of 2 > + * > + * @param x > + * The integer value to algin > + * > + * @return > + * Input parameter aligned to the previous power of 2 > + */ > +static inline uint32_t > +rte_align32prevpow2(uint32_t x) > +{ > + x =3D rte_combine32ms1b(x); > + > + return x - (x >> 1); > +} > + > /** > * Aligns 64b input parameter to the next power of 2 > * > @@ -272,16 +330,28 @@ static inline uint64_t rte_align64pow2(uint64_t v)= { > v--; > - v |=3D v >> 1; > - v |=3D v >> 2; > - v |=3D v >> 4; > - v |=3D v >> 8; > - v |=3D v >> 16; > - v |=3D v >> 32; > + v =3D rte_combine64ms1b(v); >=20 > return v + 1; > } >=20 > +/** > + * Aligns 64b input parameter to the previous power of 2 > + * > + * @param v > + * The 64b value to align > + * > + * @return > + * Input parameter aligned to the previous power of 2 > + */ > +static inline uint64_t > +rte_align64prevpow2(uint64_t v) > +{ > + v =3D rte_combine64ms1b(v); > + > + return v - (v >> 1); > +} > + > /*********** Macros for calculating min and max **********/ >=20 > /** > -- > 2.16.3