From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR01-HE1-obe.outbound.protection.outlook.com (mail-he1eur01on0071.outbound.protection.outlook.com [104.47.0.71]) by dpdk.org (Postfix) with ESMTP id D9ED41B2A3 for ; Sun, 5 Nov 2017 16:41:38 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=6wUz224U2UiSit7rZ/vj1dsCAhhuZoIHKwKkua8t8B0=; b=VWZ3Ptd1l7uh8Z6PvEHKEQoFBhe8O+o/sOfVL4iwYKoUZ9zpVnV+Ga9DuDn+U59SxyItlAkO5OB0pT4O3OVCGXFEHu3f/XxiD6Kl9av5+gZlDgDS8cAjfmtbQHu0qbVxH+CjVUHPp+6tJVD4vdWOjqLbA5g7H3rRQmw4VHFQdtY= Received: from AM4PR05MB1907.eurprd05.prod.outlook.com (10.167.91.15) by AM4PR05MB1908.eurprd05.prod.outlook.com (10.167.91.16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.197.13; Sun, 5 Nov 2017 15:41:36 +0000 Received: from AM4PR05MB1907.eurprd05.prod.outlook.com ([fe80::c568:a3d:1d2:c68]) by AM4PR05MB1907.eurprd05.prod.outlook.com ([fe80::c568:a3d:1d2:c68%13]) with mapi id 15.20.0197.017; Sun, 5 Nov 2017 15:41:36 +0000 From: Mordechay Haimovsky To: Adrien Mazarguil CC: "dev@dpdk.org" Thread-Topic: [PATCH v2] net/mlx4: enhance Rx packet type offloads Thread-Index: AQHTU9QvJJyrhlTylEyKlcE0hR0mwKMCtuQAgAMLLqA= Date: Sun, 5 Nov 2017 15:41:36 +0000 Message-ID: References: <1509624874-56118-1-git-send-email-motih@mellanox.com> <20171103142310.GQ24849@6wind.com> In-Reply-To: <20171103142310.GQ24849@6wind.com> Accept-Language: he-IL, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=motih@mellanox.com; x-originating-ip: [193.47.165.251] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; AM4PR05MB1908; 6:taH/Z5pjjepwc1WQDsMyPW40Icm/cjLFbB0lYm4qnUSFdkPEpQsW6GDKjQDmAvW49aRxLYVq8/6sghbJvJWd0QX56c0sdvNj6aT2ez5/3af20NsTValvXsctNqrhH+vS67ZNsMrdqAOJB8so/u8GTg2z+OrVIuedlfqYGs5Ii6ll/CoIZWydH0UcvyztBGPEp5+EnfsUg21jLeuE+SwLGc3X4mdFoaPTBVGy4it4jeMIL3u5wMS/Rml5vicFHh5sj4U2pkp5tYs817u5Xdw1SFq8tNRQ7fD9/bNXtG3Q4XuqvQG3ysbTj7BzjyBg6wcuEi9Q7Dq6wHlm6VmMiUIuJEct4VEVzyloWaqLgDPxYWA=; 5:/LkFSR5zSfF6t83E+3Izc4rRbkexsWIFdh3IyI69/cd4n7s544NduVB0y4V37IkdHfTd3Xa1W0ftUiokV6zeaO/Ec1Ri82ZE7xe/o8QBibNYotCNmh1TyX5+U8W5I+8Z3EPvNvFR0LVepgTK6E6J4xlDQ9n5akOWte59JlK5Ntg=; 24:Iep7mY9Uu7Ha7XVdZSAzBll3WY/OSGW6ntwSsLRWl20NrWYaBHQnDnLJpch106NQGelzdqBq/MtRw2/MbvVYSjwGOpn5aIT0t1Bail+GB/Q=; 7:zFeLK0ZZ6e1WWf7UuMvRmlb9HZkvrVgk2EB3GHtMliQ9Og58WwgR4loIKgocj1KkE0AK6hT/Pzq8snE5718g0ZJ5TkGgUhwPNZ3b3W/nGE+BfczM/WTLX02RXHNrmrnpoPtZnUFW4b2AZBqnM6+mUQ6Uot9vbS1JuTM6VVD7bkMEqD9J7vxwTZWl8WT8+c3q7I0BF4gREOo9uhxBCq8I0xA/r2yDO/Jr/CWwO/rLMI7Tz7tQwliKHQFEkpaLbpEP x-ms-exchange-antispam-srfa-diagnostics: SSOS; x-ms-office365-filtering-correlation-id: 585478c3-5799-4422-5188-08d52463b2ca x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(4534020)(4602075)(4627115)(201703031133081)(201702281549075)(48565401081)(2017052603199); SRVR:AM4PR05MB1908; x-ms-traffictypediagnostic: AM4PR05MB1908: x-ld-processed: a652971c-7d2e-4d9b-a6a4-d149256f461b,ExtAddr x-exchange-antispam-report-test: UriScan:(211171220733660); x-microsoft-antispam-prvs: x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(2401047)(8121501046)(5005006)(3231021)(100000703101)(100105400095)(3002001)(93006095)(93001095)(10201501046)(6055026)(6041248)(20161123564025)(20161123562025)(20161123555025)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123560025)(20161123558100)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095); SRVR:AM4PR05MB1908; BCL:0; PCL:0; RULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095); SRVR:AM4PR05MB1908; x-forefront-prvs: 04825EA361 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(6009001)(39860400002)(346002)(376002)(199003)(13464003)(24454002)(189002)(53376002)(6506006)(3280700002)(6436002)(66066001)(5660300001)(53936002)(2950100002)(6916009)(2900100001)(53946003)(25786009)(7696004)(8936002)(54356999)(76176999)(575784001)(50986999)(97736004)(99286004)(5250100002)(6246003)(3846002)(6116002)(102836003)(8676002)(966005)(316002)(189998001)(53546010)(86362001)(2906002)(33656002)(305945005)(3660700001)(7736002)(81166006)(68736007)(229853002)(6306002)(105586002)(14454004)(9686003)(4326008)(101416001)(478600001)(81156014)(106356001)(55016002)(74316002)(42262002)(579004); DIR:OUT; SFP:1101; SCL:1; SRVR:AM4PR05MB1908; H:AM4PR05MB1907.eurprd05.prod.outlook.com; FPR:; SPF:None; PTR:InfoNoRecords; A:1; MX:1; LANG:en; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 585478c3-5799-4422-5188-08d52463b2ca X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Nov 2017 15:41:36.1821 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR05MB1908 Subject: Re: [dpdk-dev] [PATCH v2] net/mlx4: enhance Rx packet type offloads X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Nov 2017 15:41:39 -0000 See inline > -----Original Message----- > From: Adrien Mazarguil [mailto:adrien.mazarguil@6wind.com] > Sent: Friday, November 3, 2017 4:23 PM > To: Mordechay Haimovsky > Cc: dev@dpdk.org > Subject: Re: [PATCH v2] net/mlx4: enhance Rx packet type offloads >=20 > On Thu, Nov 02, 2017 at 02:14:34PM +0200, Moti Haimovsky wrote: > > This patch enhances the Rx packet type offload to also report the L4 > > protocol information in the hw ptype filled by the PMD for each > > received packet. > > > > Signed-off-by: Moti Haimovsky > > --- > > V2: > > * Modifications according to review by Adrien Mazarguil > > > > Re: [PATCH] net/mlx4: enhance Rx packet type offloads >=20 > Except for the bit about using a loop in mlx4_ptype_table() to populate > mlx4_ptype_table[] in fewer LoCs :) >=20 > All right, let's keep it as an improvement for later. >=20 > > * Added mlx4_dev_supported_ptypes_get used in > .dev_supported_ptypes_get > > for reporting supported packet types. >=20 > More comments below. >=20 > > --- > > drivers/net/mlx4/mlx4.c | 3 + > > drivers/net/mlx4/mlx4.h | 1 + > > drivers/net/mlx4/mlx4_ethdev.c | 33 ++++++ > > drivers/net/mlx4/mlx4_prm.h | 15 +++ > > drivers/net/mlx4/mlx4_rxtx.c | 258 > +++++++++++++++++++++++++++++++++++++---- > > drivers/net/mlx4/mlx4_rxtx.h | 1 + > > 6 files changed, 288 insertions(+), 23 deletions(-) > > > > diff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c index > > 5d35a50..a3dca5d 100644 > > --- a/drivers/net/mlx4/mlx4.c > > +++ b/drivers/net/mlx4/mlx4.c > > @@ -244,6 +244,7 @@ struct mlx4_conf { > > .stats_get =3D mlx4_stats_get, > > .stats_reset =3D mlx4_stats_reset, > > .dev_infos_get =3D mlx4_dev_infos_get, > > + .dev_supported_ptypes_get =3D mlx4_dev_supported_ptypes_get, > > .vlan_filter_set =3D mlx4_vlan_filter_set, > > .rx_queue_setup =3D mlx4_rx_queue_setup, > > .tx_queue_setup =3D mlx4_tx_queue_setup, @@ -706,6 +707,8 @@ > struct > > mlx4_conf { static void > > rte_mlx4_pmd_init(void) > > { > > + /* Build the static table for ptype conversion. */ > > + mlx4_set_ptype_table(); > > /* > > * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use > > * huge pages. Calling ibv_fork_init() during init allows diff --git > > a/drivers/net/mlx4/mlx4.h b/drivers/net/mlx4/mlx4.h index > > e0a9853..fd4426c 100644 > > --- a/drivers/net/mlx4/mlx4.h > > +++ b/drivers/net/mlx4/mlx4.h > > @@ -149,6 +149,7 @@ int mlx4_flow_ctrl_get(struct rte_eth_dev *dev, > > struct rte_eth_fc_conf *fc_conf); int > > mlx4_flow_ctrl_set(struct rte_eth_dev *dev, > > struct rte_eth_fc_conf *fc_conf); > > +const uint32_t *mlx4_dev_supported_ptypes_get(struct rte_eth_dev > > +*dev); > > > > /* mlx4_intr.c */ > > > > diff --git a/drivers/net/mlx4/mlx4_ethdev.c > > b/drivers/net/mlx4/mlx4_ethdev.c index b0acd12..7be66fc 100644 > > --- a/drivers/net/mlx4/mlx4_ethdev.c > > +++ b/drivers/net/mlx4/mlx4_ethdev.c > > @@ -1013,3 +1013,36 @@ enum rxmode_toggle { > > assert(ret >=3D 0); > > return -ret; > > } > > + > > +/** > > + * DPDK callback to retrieve the received packet types that are > > +recognizes > > + * by the device. >=20 > recognizes =3D> recognized / supported >=20 > > + * > > + * @param dev > > + * Pointer to Ethernet device structure. > > + * > > + * @return > > + * pointer to an array of recognized packet types if in Rx burst mod= e, >=20 > pointer =3D> Pointer >=20 > Why only "in Rx burst mode"? >=20 > > + * NULL otherwise. > > + */ > > +const uint32_t * > > +mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev) { > > + static const uint32_t ptypes[] =3D { > > + /* refers to rxq_cq_to_pkt_type() */ > > + RTE_PTYPE_L2_ETHER, > > + RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, > > + RTE_PTYPE_L3_IPV6_EXT_UNKNOWN, > > + RTE_PTYPE_L4_FRAG, > > + RTE_PTYPE_L4_TCP, > > + RTE_PTYPE_L4_UDP, > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN, > > + RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN, > > + RTE_PTYPE_UNKNOWN > > + }; > > + > > + if (dev->rx_pkt_burst =3D=3D mlx4_rx_burst) > > + return ptypes; > > + return NULL; >=20 > How about just returning the array regardless? >>From DPDK documentation (and as done in other drivers): http://dpdk.org/doc/api/rte__ethdev_8h.html#aa63202d322632467f9cc5fc460e04e= a4 Note Better to invoke this API after the device is already started or rx burst f= unction is decided, to obtain correct supported ptypes. if a given PMD does not report what ptypes it supports, then the supported = ptype count is reported as 0. In our case rx_pkt_burst can also point to mlx4_rx_burst_removed >=20 > > +} >=20 > This function was added at the wrong spot, you should keep the same order > as declarations in mlx4.h. When in doubt, always add new functions at the > end of files you're modifying. >=20 Moved the function to EOF. > > + > > diff --git a/drivers/net/mlx4/mlx4_prm.h b/drivers/net/mlx4/mlx4_prm.h > > index b0fd982..09abd72 100644 > > --- a/drivers/net/mlx4/mlx4_prm.h > > +++ b/drivers/net/mlx4/mlx4_prm.h > > @@ -75,9 +75,24 @@ enum { > > MLX4_CQE_L2_TUNNEL_IPV4 =3D (int)(1u << 25), > > MLX4_CQE_L2_TUNNEL_L4_CSUM =3D (int)(1u << 26), > > MLX4_CQE_L2_TUNNEL =3D (int)(1u << 27), > > + MLX4_CQE_L2_VLAN_MASK =3D (int)(3u << 29), > > MLX4_CQE_L2_TUNNEL_IPOK =3D (int)(1u << 31), }; > > > > +/* CQE status flags. */ > > +#define MLX4_CQE_STATUS_IPV4 (1 << 22) #define > MLX4_CQE_STATUS_IPV4F > > +(1 << 23) #define MLX4_CQE_STATUS_IPV6 (1 << 24) #define > > +MLX4_CQE_STATUS_IPV4OPT (1 << 25) #define MLX4_CQE_STATUS_TCP > (1 << > > +26) #define MLX4_CQE_STATUS_UDP (1 << 27) #define > > +MLX4_CQE_STATUS_PTYPE_MASK (MLX4_CQE_STATUS_IPV4 | \ > > + MLX4_CQE_STATUS_IPV4F | \ > > + MLX4_CQE_STATUS_IPV6 | \ > > + MLX4_CQE_STATUS_IPV4OPT | \ > > + MLX4_CQE_STATUS_TCP | \ > > + MLX4_CQE_STATUS_UDP) > > + >=20 > OK except one last suggestion to enhance readability: >=20 > #define MLX4_CQE_STATUS_PTYPE_MASK \ > (MLX4_CQE_STATUS_IPV4 | \ > MLX4_CQE_STATUS_IPV4F | \ > ... > MLX4_CQE_STATUS_UDP) >=20 > > /* Send queue information. */ > > struct mlx4_sq { > > uint8_t *buf; /**< SQ buffer. */ > > diff --git a/drivers/net/mlx4/mlx4_rxtx.c > > b/drivers/net/mlx4/mlx4_rxtx.c index 67dc712..765e79e 100644 > > --- a/drivers/net/mlx4/mlx4_rxtx.c > > +++ b/drivers/net/mlx4/mlx4_rxtx.c > > @@ -71,6 +71,210 @@ struct pv { > > uint32_t val; > > }; > > > > +/** A table to translate Rx completion flags to packet type. */ > > +uint32_t mlx4_ptype_table[] __rte_cache_aligned =3D { > > + [0xff] =3D RTE_PTYPE_UNKNOWN, /**=20 > Missing space before "Last". However since RTE_PTYPE_UNKNOWN resolves > to 0 and all holes in this table are implicitly zeroed as well, this last= entry has > nothing special. >=20 > How about not initializing it explicitly and instead size the table > properly: >=20 > uint32_t mlx4_ptype_table[0x100] __rte_cache_aligned; >=20 > > +}; > > + > > +/** > > + * Build a table to translate Rx completion flags to packet type. > > + * > > + * @note: fix mlx4_dev_supported_ptypes_get() if any change here. > > + */ > > +void > > +mlx4_set_ptype_table(void) > > +{ > > + unsigned int i; > > + uint32_t *p =3D mlx4_ptype_table; > > + > > + /* Last entry must not be overwritten, reserved for errored packet. > */ > > + for (i =3D 0; i < RTE_DIM(mlx4_ptype_table) - 1; ++i) > > + p[i] =3D RTE_PTYPE_UNKNOWN; >=20 > The above suggestion allows this loop to be removed as well as the > exception for the last entry. >=20 > > + /* > > + * The index to the array should have: > > + * bit[7] - MLX4_CQE_L2_TUNNEL > > + * bit[6] - MLX4_CQE_L2_TUNNEL_IPV4 > > + * bit[5] - MLX4_CQE_STATUS_UDP > > + * bit[4] - MLX4_CQE_STATUS_TCP > > + * bit[3] - MLX4_CQE_STATUS_IPV4OPT > > + * bit[2] - MLX4_CQE_STATUS_IPV6 > > + * bit[1] - MLX4_CQE_STATUS_IPV4F > > + * bit[0] - MLX4_CQE_STATUS_IPV4 > > + * giving a total of up to 256 entries. > > + */ > > + p[0x00] =3D RTE_PTYPE_L2_ETHER; > > + p[0x01] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN; > > + p[0x02] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_L4_FRAG; > > + p[0x03] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_L4_FRAG; > > + p[0x04] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN; > > + p[0x09] =3D RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT; > > + p[0x0a] =3D RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT | > > + RTE_PTYPE_L4_FRAG; > > + p[0x11] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_L4_TCP; > > + p[0x12] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_L4_TCP; > > + p[0x14] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_L4_TCP; > > + p[0x18] =3D RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT | > > + RTE_PTYPE_L4_TCP; > > + p[0x19] =3D RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT | > > + RTE_PTYPE_L4_TCP; > > + p[0x1a] =3D RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT | > > + RTE_PTYPE_L4_TCP; > > + p[0x21] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_L4_UDP; > > + p[0x22] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_L4_UDP; > > + p[0x24] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_L4_UDP; > > + p[0x28] =3D RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT | > > + RTE_PTYPE_L4_UDP; > > + p[0x29] =3D RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT | > > + RTE_PTYPE_L4_UDP; > > + p[0x2a] =3D RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT | > > + RTE_PTYPE_L4_UDP; > > + /* Tunneled - L3 IPV6 */ > > + p[0x80] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN; > > + p[0x81] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN; > > + p[0x82] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_FRAG; > > + p[0x83] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_FRAG; > > + p[0x84] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN; > > + p[0x88] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT; > > + p[0x89] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT; > > + p[0x8a] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > RTE_PTYPE_INNER_L4_FRAG; > > + /* Tunneled - L3 IPV6, TCP */ > > + p[0x91] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_TCP; > > + p[0x92] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_FRAG | > > + RTE_PTYPE_INNER_L4_TCP; > > + p[0x93] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_FRAG | > > + RTE_PTYPE_INNER_L4_TCP; > > + p[0x94] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_TCP; > > + p[0x98] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > > + RTE_PTYPE_INNER_L4_TCP; > > + p[0x99] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > > + RTE_PTYPE_INNER_L4_TCP; > > + p[0x9a] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > RTE_PTYPE_INNER_L4_FRAG | > > + RTE_PTYPE_INNER_L4_TCP; > > + /* Tunneled - L3 IPV6, UDP */ > > + p[0xa1] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_UDP; > > + p[0xa2] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_FRAG | > > + RTE_PTYPE_INNER_L4_UDP; > > + p[0xa3] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_FRAG | > > + RTE_PTYPE_INNER_L4_UDP; > > + p[0xa4] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_UDP; > > + p[0xa8] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > > + RTE_PTYPE_INNER_L4_UDP; > > + p[0xa9] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > > + RTE_PTYPE_INNER_L4_UDP; > > + p[0xaa] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > RTE_PTYPE_INNER_L4_FRAG | > > + RTE_PTYPE_INNER_L4_UDP; > > + /* Tunneled - L3 IPV4 */ > > + p[0xc0] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN; > > + p[0xc1] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN; > > + p[0xc2] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_FRAG; > > + p[0xc3] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_FRAG; > > + p[0xc4] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN; > > + p[0xc8] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT; > > + p[0xc9] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT; > > + p[0xca] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > > + RTE_PTYPE_INNER_L4_FRAG; > > + /* Tunneled - L3 IPV4, TCP */ > > + p[0xd0] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_TCP; > > + p[0xd1] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_TCP; > > + p[0xd2] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_FRAG | > > + RTE_PTYPE_INNER_L4_TCP; > > + p[0xd3] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_FRAG | > > + RTE_PTYPE_INNER_L4_TCP; > > + p[0xd4] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_TCP; > > + p[0xd8] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > > + RTE_PTYPE_INNER_L4_TCP; > > + p[0xd9] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > > + RTE_PTYPE_INNER_L4_TCP; > > + p[0xda] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > RTE_PTYPE_INNER_L4_FRAG | > > + RTE_PTYPE_INNER_L4_TCP; > > + /* Tunneled - L3 IPV4, UDP */ > > + p[0xe0] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_UDP; > > + p[0xe1] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_UDP; > > + p[0xe2] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_FRAG | > > + RTE_PTYPE_INNER_L4_UDP; > > + p[0xe3] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_FRAG | > > + RTE_PTYPE_INNER_L4_UDP; > > + p[0xe4] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L4_UDP; > > + p[0xe8] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > RTE_PTYPE_INNER_L4_UDP; > > + p[0xe9] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > RTE_PTYPE_INNER_L4_UDP; > > + p[0xea] =3D RTE_PTYPE_L2_ETHER | > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | > > + RTE_PTYPE_INNER_L3_IPV4_EXT | > RTE_PTYPE_INNER_L4_FRAG | > > + RTE_PTYPE_INNER_L4_UDP; > > +} > > + >=20 > Besides being also in the wrong spot regarding mlx4_rxtx.h, this initiali= zation > function is in the wrong file since it's not called from the data plane, = it should > be moved either to mlx4.c or mlx4_rxq.c. Will remove it altogether, Initialization will be done statically at array = definition. >=20 > > /** > > * Stamp a WQE so it won't be reused by the HW. > > * > > @@ -568,30 +772,39 @@ struct pv { > > /** > > * Translate Rx completion flags to packet type. > > * > > - * @param flags > > - * Rx completion flags returned by mlx4_cqe_flags(). > > + * @param[in] cqe > > + * Pointer to CQE. > > * > > * @return > > - * Packet type in mbuf format. > > + * Packet type for struct rte_mbuf. > > */ > > static inline uint32_t > > -rxq_cq_to_pkt_type(uint32_t flags) > > +rxq_cq_to_pkt_type(volatile struct mlx4_cqe *cqe) > > { > > - uint32_t pkt_type; > > + uint8_t idx =3D 0; > > + uint32_t pinfo =3D rte_be_to_cpu_32(cqe->vlan_my_qpn); > > + uint32_t status =3D rte_be_to_cpu_32(cqe->status); > > > > - if (flags & MLX4_CQE_L2_TUNNEL) > > - pkt_type =3D > > - mlx4_transpose(flags, > > - MLX4_CQE_L2_TUNNEL_IPV4, > > - RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) | > > - mlx4_transpose(flags, > > - MLX4_CQE_STATUS_IPV4_PKT, > > - > RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN); > > - else > > - pkt_type =3D mlx4_transpose(flags, > > - MLX4_CQE_STATUS_IPV4_PKT, > > - > RTE_PTYPE_L3_IPV4_EXT_UNKNOWN); > > - return pkt_type; > > + /* > > + * The index to the array should have: > > + * bit[7] - MLX4_CQE_L2_TUNNEL > > + * bit[6] - MLX4_CQE_L2_TUNNEL_IPV4 > > + */ > > + if (!(pinfo & MLX4_CQE_L2_VLAN_MASK) && (pinfo & > MLX4_CQE_L2_TUNNEL)) > > + idx |=3D ((pinfo & MLX4_CQE_L2_TUNNEL) >> 20) | > > + ((pinfo & MLX4_CQE_L2_TUNNEL_IPV4) >> 19); > > + /* > > + * The index to the array should have: > > + * bit[5] - MLX4_CQE_STATUS_UDP > > + * bit[4] - MLX4_CQE_STATUS_TCP > > + * bit[3] - MLX4_CQE_STATUS_IPV4OPT > > + * bit[2] - MLX4_CQE_STATUS_IPV6 > > + * bit[1] - MLX4_CQE_STATUS_IPV4F > > + * bit[0] - MLX4_CQE_STATUS_IPV4 > > + * giving a total of up to 256 entries. > > + */ > > + idx |=3D ((status & MLX4_CQE_STATUS_PTYPE_MASK) >> 22); > > + return mlx4_ptype_table[idx]; > > } > > > > /** > > @@ -774,6 +987,10 @@ struct pv { > > goto skip; > > } > > pkt =3D seg; > > + /* Update packet information. */ > > + pkt->packet_type =3D rxq_cq_to_pkt_type(cqe); > > + pkt->ol_flags =3D 0; > > + pkt->pkt_len =3D len; > > if (rxq->csum | rxq->csum_l2tun) { > > uint32_t flags =3D > > mlx4_cqe_flags(cqe, > > @@ -784,12 +1001,7 @@ struct pv { > > rxq_cq_to_ol_flags(flags, > > rxq->csum, > > rxq->csum_l2tun); > > - pkt->packet_type =3D > rxq_cq_to_pkt_type(flags); > > - } else { > > - pkt->packet_type =3D 0; > > - pkt->ol_flags =3D 0; > > } > > - pkt->pkt_len =3D len; > > } > > rep->nb_segs =3D 1; > > rep->port =3D rxq->port_id; > > diff --git a/drivers/net/mlx4/mlx4_rxtx.h > > b/drivers/net/mlx4/mlx4_rxtx.h index 7d67748..e5810ac 100644 > > --- a/drivers/net/mlx4/mlx4_rxtx.h > > +++ b/drivers/net/mlx4/mlx4_rxtx.h > > @@ -174,6 +174,7 @@ uint16_t mlx4_tx_burst_removed(void *dpdk_txq, > struct rte_mbuf **pkts, > > uint16_t pkts_n); > > uint16_t mlx4_rx_burst_removed(void *dpdk_rxq, struct rte_mbuf > **pkts, > > uint16_t pkts_n); > > +void mlx4_set_ptype_table(void); > > > > /* mlx4_txq.c */ > > > > -- > > 1.8.3.1 > > >=20 > -- > Adrien Mazarguil > 6WIND