From: Slava Ovsiienko <viacheslavo@mellanox.com>
To: Dekel Peled <dekelp@mellanox.com>,
Matan Azrad <matan@mellanox.com>,
Raslan Darawsheh <rasland@mellanox.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH] net/mlx5: set VLAN tag matcher bit properly
Date: Sun, 9 Feb 2020 18:09:57 +0000 [thread overview]
Message-ID: <AM4PR05MB3265997BE2CCB303FACAA733D21E0@AM4PR05MB3265.eurprd05.prod.outlook.com> (raw)
In-Reply-To: <5efd0f36d43342b0e450fed3642f2b2498cf0899.1581251023.git.dekelp@mellanox.com>
> -----Original Message-----
> From: Dekel Peled <dekelp@mellanox.com>
> Sent: Sunday, February 9, 2020 14:26
> To: Matan Azrad <matan@mellanox.com>; Slava Ovsiienko
> <viacheslavo@mellanox.com>; Raslan Darawsheh <rasland@mellanox.com>
> Cc: dev@dpdk.org
> Subject: [PATCH] net/mlx5: set VLAN tag matcher bit properly
>
> Currently MLX5 PMD can't match on untagged packets specifically.
> Tagged traffic still hits the flows intended for untagged packets.
> If the flow has ETH, it will catch all matching packets, tagged and untagged.
> The solution is to use cvlan_tag bit.
> If mask=1 and value=0 it matches on untagged traffic.
> If mask=1 and value=1 it matches on tagged traffic.
> This is the kernel implementation.
>
> This patch updated MLX5 PMD to set cvlan_tag mask and value according to
> flow rule contents.
>
> Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> ---
> drivers/net/mlx5/mlx5_flow_dv.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/net/mlx5/mlx5_flow_dv.c
> b/drivers/net/mlx5/mlx5_flow_dv.c index 3daabd3..a28af7c 100644
> --- a/drivers/net/mlx5/mlx5_flow_dv.c
> +++ b/drivers/net/mlx5/mlx5_flow_dv.c
> @@ -5214,6 +5214,15 @@ struct field_modify_info modify_tcp[] = {
> rte_be_to_cpu_16(eth_m->type));
> l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
> ethertype);
> *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
> + if (eth_v->type) {
> + /* When ethertype is present set mask for tagged VLAN. */
> + MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
> + /* Set value for tagged VLAN if ethertype is 802.1Q. */
> + if (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_VLAN) ||
> + eth_v->type == RTE_BE16(RTE_ETHER_TYPE_QINQ))
> + MLX5_SET(fte_match_set_lyr_2_4, headers_v,
> cvlan_tag,
> + 1);
> + }
> }
>
> /**
> @@ -5354,6 +5363,7 @@ struct field_modify_info modify_tcp[] = {
> ipv4_m->hdr.next_proto_id);
> MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
> ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
> + MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
> }
>
> /**
> @@ -5458,6 +5468,7 @@ struct field_modify_info modify_tcp[] = {
> ipv6_m->hdr.proto);
> MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
> ipv6_v->hdr.proto & ipv6_m->hdr.proto);
> + MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
> }
>
> /**
> --
> 1.8.3.1
next prev parent reply other threads:[~2020-02-09 18:10 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-09 12:25 Dekel Peled
2020-02-09 18:09 ` Slava Ovsiienko [this message]
2020-02-11 11:05 ` [dpdk-dev] [PATCH v2] net/mlx5: fix VLAN item match for DV mode Dekel Peled
2020-02-12 13:09 ` Matan Azrad
2020-02-12 14:10 ` Raslan Darawsheh
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