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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(4636009)(376002)(39860400002)(346002)(396003)(136003)(46966006)(36840700001)(33656002)(81166007)(186003)(356005)(83380400001)(53546011)(6506007)(82740400003)(8676002)(82310400003)(36860700001)(478600001)(7696005)(47076005)(86362001)(8936002)(70206006)(70586007)(54906003)(52536014)(5660300002)(9686003)(55016002)(4326008)(110136005)(316002)(336012)(26005)(2906002); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Mar 2021 08:07:18.8767 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0ab327a5-92ea-4f5a-4cf2-08d8edd2adf0 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT056.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB6681 Subject: Re: [dpdk-dev] [PATCH V2 1/4] config/arm: add Hisilicon kunpeng920 implementer X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: dev On Behalf Of Lijun Ou > Sent: Wednesday, March 10, 2021 9:36 AM > To: thomas@monjalon.net; ferruh.yigit@intel.com > Cc: dev@dpdk.org; linuxarm@openeuler.org > Subject: [dpdk-dev] [PATCH V2 1/4] config/arm: add Hisilicon kunpeng920 > implementer >=20 > Here addes Kunpeng920 config back which was deleted. >=20 > Fixes: 91c730fd4e09 ("config/arm: remove unused or superfluous variables"= ) >=20 > Signed-off-by: Chengchang Tang > Signed-off-by: Lijun Ou > --- > V1->V2: > - rewrite patch title. > - split the patch into two. > --- > config/arm/meson.build | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) >=20 > diff --git a/config/arm/meson.build b/config/arm/meson.build index > 00bc461..3826900 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -133,6 +133,25 @@ implementer_cavium =3D { > } > } >=20 > +implementer_hisilicon =3D { > + 'description': 'Hisilicon', > + 'flags': [ > + ['RTE_USE_C11_MEM_MODEL', true], > + ['RTE_CACHE_LINE_SIZE', 128], Just want to double check. One Kunpeng920 box I can access have cache line size 64B. Thanks. > + ['RTE_MAX_NUMA_NODES', 4] > + ], > + 'part_number_config': { > + '0xd01': { > + 'machine_args': ['-march=3Darmv8.2-a+crypto', > + '-mtune=3Dtsv110'], > + 'flag': [['RTE_MACHINE', '"kunpeng920"'], > + ['RTE_MAX_LCORE', 128], > + ['RTE_ARM_FEATURE_ATOMICS', true] > + ] > + } > + } > +} > + > implementer_ampere =3D { > 'description': 'Ampere Computing', > 'flags': [ > @@ -190,6 +209,7 @@ implementers =3D { > 'generic': implementer_generic, > '0x41': implementer_arm, > '0x43': implementer_cavium, > + '0x48': implementer_hisilicon, > '0x50': implementer_ampere, > '0x51': implementer_qualcomm, > '0x56': implementer_marvell, > -- > 2.7.4