* [dpdk-dev] [PATCH] config/arm: add Qualcomm Centriq 2400 part number
@ 2021-05-25 8:16 Thierry Herbelot
2021-05-25 8:18 ` Thomas Monjalon
2021-05-25 8:24 ` [dpdk-dev] [PATCH v2] " Thierry Herbelot
0 siblings, 2 replies; 20+ messages in thread
From: Thierry Herbelot @ 2021-05-25 8:16 UTC (permalink / raw)
To: dev; +Cc: Thierry Herbelot, Thomas Monjalon
0xc00 is for "SoC 2.0" Qualcom Centriq servers.
0x800 is for "SoC 1.1".
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
---
config/arm/meson.build | 1 +
1 file changed, 1 insertion(+)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index e83a56e0d589..971a050efd93 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -226,6 +226,7 @@ soc_bluefield = {
soc_centriq2400 = {
'description': 'Qualcomm Centriq 2400',
'implementer': '0x51',
+ 'part_number': '0x800',
'part_number': '0xc00',
'numa': false
}
--
2.29.2
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH] config/arm: add Qualcomm Centriq 2400 part number
2021-05-25 8:16 [dpdk-dev] [PATCH] config/arm: add Qualcomm Centriq 2400 part number Thierry Herbelot
@ 2021-05-25 8:18 ` Thomas Monjalon
2021-05-25 8:24 ` [dpdk-dev] [PATCH v2] " Thierry Herbelot
1 sibling, 0 replies; 20+ messages in thread
From: Thomas Monjalon @ 2021-05-25 8:18 UTC (permalink / raw)
To: Thierry Herbelot; +Cc: dev
25/05/2021 10:16, Thierry Herbelot:
> 0xc00 is for "SoC 2.0" Qualcom Centriq servers.
> 0x800 is for "SoC 1.1".
>
> Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
Please Cc those who were involved in previous Qualcomm patch,
and especially Arm maintainers.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [dpdk-dev] [PATCH v2] config/arm: add Qualcomm Centriq 2400 part number
2021-05-25 8:16 [dpdk-dev] [PATCH] config/arm: add Qualcomm Centriq 2400 part number Thierry Herbelot
2021-05-25 8:18 ` Thomas Monjalon
@ 2021-05-25 8:24 ` Thierry Herbelot
2021-06-17 7:06 ` Thomas Monjalon
2021-06-17 8:16 ` [dpdk-dev] [PATCH V3] " Thierry Herbelot
1 sibling, 2 replies; 20+ messages in thread
From: Thierry Herbelot @ 2021-05-25 8:24 UTC (permalink / raw)
To: dev
Cc: Thierry Herbelot, Thomas Monjalon, Jerin Jacob, Ruifeng Wang,
Honnappa Nagarahalli, Juraj Linkeš
0xc00 is for "SoC 2.0" Qualcom Centriq servers.
0x800 is for "SoC 1.1".
Cc: Jerin Jacob <jerinj@marvell.com>
Cc: Ruifeng Wang <ruifeng.wang@arm.com>
Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
--
V2: add maintainers as Cc
---
config/arm/meson.build | 1 +
1 file changed, 1 insertion(+)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index e83a56e0d589..971a050efd93 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -226,6 +226,7 @@ soc_bluefield = {
soc_centriq2400 = {
'description': 'Qualcomm Centriq 2400',
'implementer': '0x51',
+ 'part_number': '0x800',
'part_number': '0xc00',
'numa': false
}
--
2.29.2
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH v2] config/arm: add Qualcomm Centriq 2400 part number
2021-05-25 8:24 ` [dpdk-dev] [PATCH v2] " Thierry Herbelot
@ 2021-06-17 7:06 ` Thomas Monjalon
2021-06-17 7:21 ` David Marchand
` (2 more replies)
2021-06-17 8:16 ` [dpdk-dev] [PATCH V3] " Thierry Herbelot
1 sibling, 3 replies; 20+ messages in thread
From: Thomas Monjalon @ 2021-06-17 7:06 UTC (permalink / raw)
To: Jerin Jacob, Ruifeng Wang, Honnappa Nagarahalli
Cc: dev, Thierry Herbelot, Juraj Linkeš
25/05/2021 10:24, Thierry Herbelot:
> 0xc00 is for "SoC 2.0" Qualcom Centriq servers.
> 0x800 is for "SoC 1.1".
>
> Cc: Jerin Jacob <jerinj@marvell.com>
> Cc: Ruifeng Wang <ruifeng.wang@arm.com>
> Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
>
> Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
> --
> V2: add maintainers as Cc
> ---
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -226,6 +226,7 @@ soc_bluefield = {
> soc_centriq2400 = {
> 'description': 'Qualcomm Centriq 2400',
> 'implementer': '0x51',
> + 'part_number': '0x800',
> 'part_number': '0xc00',
> 'numa': false
> }
Any comment or ack?
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH v2] config/arm: add Qualcomm Centriq 2400 part number
2021-06-17 7:06 ` Thomas Monjalon
@ 2021-06-17 7:21 ` David Marchand
2021-06-17 7:24 ` Ruifeng Wang
2021-06-17 7:28 ` Ruifeng Wang
2 siblings, 0 replies; 20+ messages in thread
From: David Marchand @ 2021-06-17 7:21 UTC (permalink / raw)
To: Thierry Herbelot
Cc: Jerin Jacob, Ruifeng Wang, Honnappa Nagarahalli, dev,
Juraj Linkeš,
Thomas Monjalon
On Thu, Jun 17, 2021 at 9:07 AM Thomas Monjalon <thomas@monjalon.net> wrote:
>
> 25/05/2021 10:24, Thierry Herbelot:
> > 0xc00 is for "SoC 2.0" Qualcom Centriq servers.
Qualcomm*
> > 0x800 is for "SoC 1.1".
> >
> > Cc: Jerin Jacob <jerinj@marvell.com>
> > Cc: Ruifeng Wang <ruifeng.wang@arm.com>
> > Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> > Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
> >
> > Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
> > --
> > V2: add maintainers as Cc
> > ---
> > --- a/config/arm/meson.build
> > +++ b/config/arm/meson.build
> > @@ -226,6 +226,7 @@ soc_bluefield = {
> > soc_centriq2400 = {
> > 'description': 'Qualcomm Centriq 2400',
> > 'implementer': '0x51',
> > + 'part_number': '0x800',
> > 'part_number': '0xc00',
> > 'numa': false
> > }
>
> Any comment or ack?
$ meson setup build-centriq --cross-file config/arm/arm64_centriq2400_linux_gcc
...
Compiler for C supports arguments -Wno-missing-field-initializers
-Wmissing-field-initializers: YES
config/arm/meson.build:226:0: ERROR: Duplicate dictionary key: part_number
--
David Marchand
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH v2] config/arm: add Qualcomm Centriq 2400 part number
2021-06-17 7:06 ` Thomas Monjalon
2021-06-17 7:21 ` David Marchand
@ 2021-06-17 7:24 ` Ruifeng Wang
2021-06-17 7:28 ` Ruifeng Wang
2 siblings, 0 replies; 20+ messages in thread
From: Ruifeng Wang @ 2021-06-17 7:24 UTC (permalink / raw)
To: thomas, jerinj, Honnappa Nagarahalli
Cc: dev, Thierry Herbelot, Juraj Linkeš, nd
> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Thursday, June 17, 2021 3:07 PM
> To: jerinj@marvell.com; Ruifeng Wang <Ruifeng.Wang@arm.com>;
> Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
> Cc: dev@dpdk.org; Thierry Herbelot <thierry.herbelot@6wind.com>; Juraj
> Linkeš <juraj.linkes@pantheon.tech>
> Subject: Re: [dpdk-dev] [PATCH v2] config/arm: add Qualcomm Centriq 2400
> part number
>
> 25/05/2021 10:24, Thierry Herbelot:
> > 0xc00 is for "SoC 2.0" Qualcom Centriq servers.
> > 0x800 is for "SoC 1.1".
> >
> > Cc: Jerin Jacob <jerinj@marvell.com>
> > Cc: Ruifeng Wang <ruifeng.wang@arm.com>
> > Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> > Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
> >
> > Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
> > --
> > V2: add maintainers as Cc
> > ---
> > --- a/config/arm/meson.build
> > +++ b/config/arm/meson.build
> > @@ -226,6 +226,7 @@ soc_bluefield = {
> > soc_centriq2400 = {
> > 'description': 'Qualcomm Centriq 2400',
> > 'implementer': '0x51',
> > + 'part_number': '0x800',
> > 'part_number': '0xc00',
> > 'numa': false
> > }
>
> Any comment or ack?
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH v2] config/arm: add Qualcomm Centriq 2400 part number
2021-06-17 7:06 ` Thomas Monjalon
2021-06-17 7:21 ` David Marchand
2021-06-17 7:24 ` Ruifeng Wang
@ 2021-06-17 7:28 ` Ruifeng Wang
2 siblings, 0 replies; 20+ messages in thread
From: Ruifeng Wang @ 2021-06-17 7:28 UTC (permalink / raw)
To: Thierry Herbelot
Cc: dev, Juraj Linkeš, thomas, jerinj, Honnappa Nagarahalli, nd
> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Thursday, June 17, 2021 3:07 PM
> To: jerinj@marvell.com; Ruifeng Wang <Ruifeng.Wang@arm.com>;
> Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
> Cc: dev@dpdk.org; Thierry Herbelot <thierry.herbelot@6wind.com>; Juraj
> Linkeš <juraj.linkes@pantheon.tech>
> Subject: Re: [dpdk-dev] [PATCH v2] config/arm: add Qualcomm Centriq 2400
> part number
>
> 25/05/2021 10:24, Thierry Herbelot:
> > 0xc00 is for "SoC 2.0" Qualcom Centriq servers.
> > 0x800 is for "SoC 1.1".
> >
> > Cc: Jerin Jacob <jerinj@marvell.com>
> > Cc: Ruifeng Wang <ruifeng.wang@arm.com>
> > Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> > Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
> >
> > Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
> > --
> > V2: add maintainers as Cc
> > ---
> > --- a/config/arm/meson.build
> > +++ b/config/arm/meson.build
> > @@ -226,6 +226,7 @@ soc_bluefield = {
> > soc_centriq2400 = {
> > 'description': 'Qualcomm Centriq 2400',
> > 'implementer': '0x51',
> > + 'part_number': '0x800',
To add support for a new part number, I think it should be added to implementer_qualcomm.
If cross compile for the new soc is needed, it needs a new soc_xx block. I'm wondering this is a real request? I assume SoC 1.0 will have no config difference from SoC 2.0.
Thanks.
> > 'part_number': '0xc00',
> > 'numa': false
> > }
>
> Any comment or ack?
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* [dpdk-dev] [PATCH V3] config/arm: add Qualcomm Centriq 2400 part number
2021-05-25 8:24 ` [dpdk-dev] [PATCH v2] " Thierry Herbelot
2021-06-17 7:06 ` Thomas Monjalon
@ 2021-06-17 8:16 ` Thierry Herbelot
2021-06-17 10:03 ` Ruifeng Wang
2021-06-17 11:36 ` [dpdk-dev] [PATCH V4] " Thierry Herbelot
1 sibling, 2 replies; 20+ messages in thread
From: Thierry Herbelot @ 2021-06-17 8:16 UTC (permalink / raw)
To: dev
Cc: Thierry Herbelot, Thomas Monjalon, Jerin Jacob, Ruifeng Wang,
Honnappa Nagarahalli, Juraj Linkeš
0xc00 is for "SoC 2.0" Qualcomm Centriq servers.
0x800 is for "SoC 1.1".
Cc: Jerin Jacob <jerinj@marvell.com>
Cc: Ruifeng Wang <ruifeng.wang@arm.com>
Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
--
V2: add maintainers as Cc
V3: fix meson syntax for the SoC v1.1 machine description
---
config/arm/meson.build | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index e83a56e0d589..b33303d09023 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -179,7 +179,8 @@ implementer_qualcomm = {
['RTE_MAX_NUMA_NODES', 1]
],
'part_number_config': {
- '0xc00': {'machine_args': ['-march=armv8-a+crc']}
+ '0x800': {'machine_args': ['-march=armv8-a+crc']},
+ '0xc00': {'machine_args': ['-march=armv8-a+crc']},
}
}
@@ -223,8 +224,15 @@ soc_bluefield = {
'numa': false
}
+soc_centriq2400_v1_1 = {
+ 'description': 'Qualcomm Centriq 2400 (SoC v1.1)',
+ 'implementer': '0x51',
+ 'part_number': '0x800',
+ 'numa': false
+}
+
soc_centriq2400 = {
- 'description': 'Qualcomm Centriq 2400',
+ 'description': 'Qualcomm Centriq 2400 (SoC v2.0)',
'implementer': '0x51',
'part_number': '0xc00',
'numa': false
--
2.29.2
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH V3] config/arm: add Qualcomm Centriq 2400 part number
2021-06-17 8:16 ` [dpdk-dev] [PATCH V3] " Thierry Herbelot
@ 2021-06-17 10:03 ` Ruifeng Wang
2021-06-17 11:24 ` Thierry Herbelot
2021-06-17 11:36 ` [dpdk-dev] [PATCH V4] " Thierry Herbelot
1 sibling, 1 reply; 20+ messages in thread
From: Ruifeng Wang @ 2021-06-17 10:03 UTC (permalink / raw)
To: Thierry Herbelot, dev
Cc: thomas, jerinj, Honnappa Nagarahalli, Juraj Linkeš, nd
> -----Original Message-----
> From: Thierry Herbelot <thierry.herbelot@6wind.com>
> Sent: Thursday, June 17, 2021 4:16 PM
> To: dev@dpdk.org
> Cc: Thierry Herbelot <thierry.herbelot@6wind.com>; thomas@monjalon.net;
> jerinj@marvell.com; Ruifeng Wang <Ruifeng.Wang@arm.com>; Honnappa
> Nagarahalli <Honnappa.Nagarahalli@arm.com>; Juraj Linkeš
> <juraj.linkes@pantheon.tech>
> Subject: [PATCH V3] config/arm: add Qualcomm Centriq 2400 part number
>
> 0xc00 is for "SoC 2.0" Qualcomm Centriq servers.
> 0x800 is for "SoC 1.1".
>
> Cc: Jerin Jacob <jerinj@marvell.com>
> Cc: Ruifeng Wang <ruifeng.wang@arm.com>
> Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
>
> Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
> --
> V2: add maintainers as Cc
> V3: fix meson syntax for the SoC v1.1 machine description
> ---
> config/arm/meson.build | 12 ++++++++++--
> 1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> e83a56e0d589..b33303d09023 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -179,7 +179,8 @@ implementer_qualcomm = {
> ['RTE_MAX_NUMA_NODES', 1]
> ],
> 'part_number_config': {
> - '0xc00': {'machine_args': ['-march=armv8-a+crc']}
> + '0x800': {'machine_args': ['-march=armv8-a+crc']},
> + '0xc00': {'machine_args': ['-march=armv8-a+crc']},
> }
> }
>
> @@ -223,8 +224,15 @@ soc_bluefield = {
> 'numa': false
> }
>
> +soc_centriq2400_v1_1 = {
> + 'description': 'Qualcomm Centriq 2400 (SoC v1.1)',
> + 'implementer': '0x51',
> + 'part_number': '0x800',
> + 'numa': false
> +}
> +
What is the difference between SoC v1.1 and SoC v2.0. Do they have different instruction levels or extensions?
They have the same machine_args. I think the two part numbers can share the same soc_xx. Because cross built binary can run on both SoCs.
What do you think?
Thanks.
> soc_centriq2400 = {
> - 'description': 'Qualcomm Centriq 2400',
> + 'description': 'Qualcomm Centriq 2400 (SoC v2.0)',
> 'implementer': '0x51',
> 'part_number': '0xc00',
> 'numa': false
> --
> 2.29.2
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH V3] config/arm: add Qualcomm Centriq 2400 part number
2021-06-17 10:03 ` Ruifeng Wang
@ 2021-06-17 11:24 ` Thierry Herbelot
2021-06-17 14:46 ` Ruifeng Wang
0 siblings, 1 reply; 20+ messages in thread
From: Thierry Herbelot @ 2021-06-17 11:24 UTC (permalink / raw)
To: Ruifeng Wang, dev
Cc: thomas, jerinj, Honnappa Nagarahalli, Juraj Linkeš, nd
On 6/17/21 12:03 PM, Ruifeng Wang wrote:
>> -----Original Message-----
>> From: Thierry Herbelot <thierry.herbelot@6wind.com>
>> Sent: Thursday, June 17, 2021 4:16 PM
>> To: dev@dpdk.org
>> Cc: Thierry Herbelot <thierry.herbelot@6wind.com>; thomas@monjalon.net;
>> jerinj@marvell.com; Ruifeng Wang <Ruifeng.Wang@arm.com>; Honnappa
>> Nagarahalli <Honnappa.Nagarahalli@arm.com>; Juraj Linkeš
>> <juraj.linkes@pantheon.tech>
>> Subject: [PATCH V3] config/arm: add Qualcomm Centriq 2400 part number
>>
>> 0xc00 is for "SoC 2.0" Qualcomm Centriq servers.
>> 0x800 is for "SoC 1.1".
>>
>> Cc: Jerin Jacob <jerinj@marvell.com>
>> Cc: Ruifeng Wang <ruifeng.wang@arm.com>
>> Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
>> Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
>>
>> Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
>> --
>> V2: add maintainers as Cc
>> V3: fix meson syntax for the SoC v1.1 machine description
>> ---
>> config/arm/meson.build | 12 ++++++++++--
>> 1 file changed, 10 insertions(+), 2 deletions(-)
>>
>> diff --git a/config/arm/meson.build b/config/arm/meson.build index
>> e83a56e0d589..b33303d09023 100644
>> --- a/config/arm/meson.build
>> +++ b/config/arm/meson.build
>> @@ -179,7 +179,8 @@ implementer_qualcomm = {
>> ['RTE_MAX_NUMA_NODES', 1]
>> ],
>> 'part_number_config': {
>> - '0xc00': {'machine_args': ['-march=armv8-a+crc']}
>> + '0x800': {'machine_args': ['-march=armv8-a+crc']},
>> + '0xc00': {'machine_args': ['-march=armv8-a+crc']},
>> }
>> }
>>
>> @@ -223,8 +224,15 @@ soc_bluefield = {
>> 'numa': false
>> }
>>
>> +soc_centriq2400_v1_1 = {
>> + 'description': 'Qualcomm Centriq 2400 (SoC v1.1)',
>> + 'implementer': '0x51',
>> + 'part_number': '0x800',
>> + 'numa': false
>> +}
>> +
> What is the difference between SoC v1.1 and SoC v2.0. Do they have different instruction levels or extensions?
> They have the same machine_args. I think the two part numbers can share the same soc_xx. Because cross built binary can run on both SoCs.
> What do you think?
Hello,
There is no visible differences between the two versions.
How do we merge the soc_centriq2400 configurations ?
It would seem it is only possible to have one part_number per soc
configuration.
Thierry
>
> Thanks.
>> soc_centriq2400 = {
>> - 'description': 'Qualcomm Centriq 2400',
>> + 'description': 'Qualcomm Centriq 2400 (SoC v2.0)',
>> 'implementer': '0x51',
>> 'part_number': '0xc00',
>> 'numa': false
>> --
>> 2.29.2
>
--
Thierry Herbelot
Senior Software Engineer
Tel: +33 1 39 30 92 61
http://www.6wind.com/
Follow us:
https://www.linkedin.com/company/6wind/
https://twitter.com/6WINDsoftware
https://www.youtube.com/user/6windsoftware
^ permalink raw reply [flat|nested] 20+ messages in thread
* [dpdk-dev] [PATCH V4] config/arm: add Qualcomm Centriq 2400 part number
2021-06-17 8:16 ` [dpdk-dev] [PATCH V3] " Thierry Herbelot
2021-06-17 10:03 ` Ruifeng Wang
@ 2021-06-17 11:36 ` Thierry Herbelot
2021-06-17 11:44 ` [dpdk-dev] [PATCH V5] " Thierry Herbelot
1 sibling, 1 reply; 20+ messages in thread
From: Thierry Herbelot @ 2021-06-17 11:36 UTC (permalink / raw)
To: dev
Cc: Thierry Herbelot, Thomas Monjalon, Jerin Jacob, Ruifeng Wang,
Honnappa Nagarahalli, Juraj Linkeš
0xc00 is for "SoC 2.0" Qualcomm Centriq servers.
0x800 is for "SoC 1.1".
Cc: Jerin Jacob <jerinj@marvell.com>
Cc: Ruifeng Wang <ruifeng.wang@arm.com>
Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
--
V2: add maintainers as Cc
V3: fix meson syntax for the SoC v1.1 machine description
V4: add new soc_centriq2400_v1_1 to the supported SoC list
---
config/arm/meson.build | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index e83a56e0d589..8e3fa6969fad 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -179,7 +179,8 @@ implementer_qualcomm = {
['RTE_MAX_NUMA_NODES', 1]
],
'part_number_config': {
- '0xc00': {'machine_args': ['-march=armv8-a+crc']}
+ '0x800': {'machine_args': ['-march=armv8-a+crc']},
+ '0xc00': {'machine_args': ['-march=armv8-a+crc']},
}
}
@@ -223,8 +224,15 @@ soc_bluefield = {
'numa': false
}
+soc_centriq2400_v1_1 = {
+ 'description': 'Qualcomm Centriq 2400 (SoC v1.1)',
+ 'implementer': '0x51',
+ 'part_number': '0x800',
+ 'numa': false
+}
+
soc_centriq2400 = {
- 'description': 'Qualcomm Centriq 2400',
+ 'description': 'Qualcomm Centriq 2400 (SoC v2.0)',
'implementer': '0x51',
'part_number': '0xc00',
'numa': false
@@ -333,7 +341,8 @@ Start of SoCs list
generic: Generic un-optimized build for all aarch64 machines.
armada: Marvell ARMADA
bluefield: NVIDIA BlueField
-centriq2400: Qualcomm Centriq 2400
+soc_centriq2400_v1_1: Qualcomm Centriq 2400 (SoC v1.1)
+centriq2400: Qualcomm Centriq 2400 (SoC v2.0)
cn10k: Marvell OCTEON 10
dpaa: NXP DPAA
emag: Ampere eMAG
@@ -354,6 +363,7 @@ socs = {
'generic': soc_generic,
'armada': soc_armada,
'bluefield': soc_bluefield,
+ 'soc_centriq2400_v1_1': soc_centriq2400_v1_1,
'centriq2400': soc_centriq2400,
'cn10k' : soc_cn10k,
'dpaa': soc_dpaa,
--
2.29.2
^ permalink raw reply [flat|nested] 20+ messages in thread
* [dpdk-dev] [PATCH V5] config/arm: add Qualcomm Centriq 2400 part number
2021-06-17 11:36 ` [dpdk-dev] [PATCH V4] " Thierry Herbelot
@ 2021-06-17 11:44 ` Thierry Herbelot
2021-06-17 15:13 ` [dpdk-dev] [PATCH V6] " Thierry Herbelot
0 siblings, 1 reply; 20+ messages in thread
From: Thierry Herbelot @ 2021-06-17 11:44 UTC (permalink / raw)
To: dev
Cc: Thierry Herbelot, Thomas Monjalon, Jerin Jacob, Ruifeng Wang,
Honnappa Nagarahalli, Juraj Linkeš
0xc00 is for "SoC 2.0" Qualcomm Centriq servers.
0x800 is for "SoC 1.1".
Cc: Jerin Jacob <jerinj@marvell.com>
Cc: Ruifeng Wang <ruifeng.wang@arm.com>
Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
--
V2: add maintainers as Cc
V3: fix meson syntax for the SoC v1.1 machine description
V4: add new soc_centriq2400_v1_1 to the supported SoC list
V5: remove 'soc_' prefix in the supported SoC list
---
config/arm/meson.build | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index e83a56e0d589..8fe01bbb1f3e 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -179,7 +179,8 @@ implementer_qualcomm = {
['RTE_MAX_NUMA_NODES', 1]
],
'part_number_config': {
- '0xc00': {'machine_args': ['-march=armv8-a+crc']}
+ '0x800': {'machine_args': ['-march=armv8-a+crc']},
+ '0xc00': {'machine_args': ['-march=armv8-a+crc']},
}
}
@@ -223,8 +224,15 @@ soc_bluefield = {
'numa': false
}
+soc_centriq2400_v1_1 = {
+ 'description': 'Qualcomm Centriq 2400 (SoC v1.1)',
+ 'implementer': '0x51',
+ 'part_number': '0x800',
+ 'numa': false
+}
+
soc_centriq2400 = {
- 'description': 'Qualcomm Centriq 2400',
+ 'description': 'Qualcomm Centriq 2400 (SoC v2.0)',
'implementer': '0x51',
'part_number': '0xc00',
'numa': false
@@ -333,7 +341,8 @@ Start of SoCs list
generic: Generic un-optimized build for all aarch64 machines.
armada: Marvell ARMADA
bluefield: NVIDIA BlueField
-centriq2400: Qualcomm Centriq 2400
+centriq2400_v1_1: Qualcomm Centriq 2400 (SoC v1.1)
+centriq2400: Qualcomm Centriq 2400 (SoC v2.0)
cn10k: Marvell OCTEON 10
dpaa: NXP DPAA
emag: Ampere eMAG
@@ -354,6 +363,7 @@ socs = {
'generic': soc_generic,
'armada': soc_armada,
'bluefield': soc_bluefield,
+ 'centriq2400_v1_1': soc_centriq2400_v1_1,
'centriq2400': soc_centriq2400,
'cn10k' : soc_cn10k,
'dpaa': soc_dpaa,
--
2.29.2
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH V3] config/arm: add Qualcomm Centriq 2400 part number
2021-06-17 11:24 ` Thierry Herbelot
@ 2021-06-17 14:46 ` Ruifeng Wang
0 siblings, 0 replies; 20+ messages in thread
From: Ruifeng Wang @ 2021-06-17 14:46 UTC (permalink / raw)
To: Thierry Herbelot, dev
Cc: thomas, jerinj, Honnappa Nagarahalli, Juraj Linkeš, nd, nd
> -----Original Message-----
> From: Thierry Herbelot <thierry.herbelot@6wind.com>
> Sent: Thursday, June 17, 2021 7:25 PM
> To: Ruifeng Wang <Ruifeng.Wang@arm.com>; dev@dpdk.org
> Cc: thomas@monjalon.net; jerinj@marvell.com; Honnappa Nagarahalli
> <Honnappa.Nagarahalli@arm.com>; Juraj Linkeš
> <juraj.linkes@pantheon.tech>; nd <nd@arm.com>
> Subject: Re: [PATCH V3] config/arm: add Qualcomm Centriq 2400 part
> number
>
> On 6/17/21 12:03 PM, Ruifeng Wang wrote:
> >> -----Original Message-----
> >> From: Thierry Herbelot <thierry.herbelot@6wind.com>
> >> Sent: Thursday, June 17, 2021 4:16 PM
> >> To: dev@dpdk.org
> >> Cc: Thierry Herbelot <thierry.herbelot@6wind.com>;
> >> thomas@monjalon.net; jerinj@marvell.com; Ruifeng Wang
> >> <Ruifeng.Wang@arm.com>; Honnappa Nagarahalli
> >> <Honnappa.Nagarahalli@arm.com>; Juraj Linkeš
> >> <juraj.linkes@pantheon.tech>
> >> Subject: [PATCH V3] config/arm: add Qualcomm Centriq 2400 part number
> >>
> >> 0xc00 is for "SoC 2.0" Qualcomm Centriq servers.
> >> 0x800 is for "SoC 1.1".
> >>
> >> Cc: Jerin Jacob <jerinj@marvell.com>
> >> Cc: Ruifeng Wang <ruifeng.wang@arm.com>
> >> Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> >> Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
> >>
> >> Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
> >> --
> >> V2: add maintainers as Cc
> >> V3: fix meson syntax for the SoC v1.1 machine description
> >> ---
> >> config/arm/meson.build | 12 ++++++++++--
> >> 1 file changed, 10 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> >> e83a56e0d589..b33303d09023 100644
> >> --- a/config/arm/meson.build
> >> +++ b/config/arm/meson.build
> >> @@ -179,7 +179,8 @@ implementer_qualcomm = {
> >> ['RTE_MAX_NUMA_NODES', 1]
> >> ],
> >> 'part_number_config': {
> >> - '0xc00': {'machine_args': ['-march=armv8-a+crc']}
> >> + '0x800': {'machine_args': ['-march=armv8-a+crc']},
> >> + '0xc00': {'machine_args': ['-march=armv8-a+crc']},
> >> }
> >> }
> >>
> >> @@ -223,8 +224,15 @@ soc_bluefield = {
> >> 'numa': false
> >> }
> >>
> >> +soc_centriq2400_v1_1 = {
> >> + 'description': 'Qualcomm Centriq 2400 (SoC v1.1)',
> >> + 'implementer': '0x51',
> >> + 'part_number': '0x800',
> >> + 'numa': false
> >> +}
> >> +
> > What is the difference between SoC v1.1 and SoC v2.0. Do they have
> different instruction levels or extensions?
> > They have the same machine_args. I think the two part numbers can share
> the same soc_xx. Because cross built binary can run on both SoCs.
> > What do you think?
>
> Hello,
>
> There is no visible differences between the two versions.
>
> How do we merge the soc_centriq2400 configurations ?
> It would seem it is only possible to have one part_number per soc
> configuration.
I think we can keep current soc_centriq2400 as there is no visible differences in two versions.
No need to add new part number to soc_centriq2400. It also works for SoC v1.1 when using SoC build.
IMO, only changes in implementer_qualcomm is required. It enables native build on SoC v1.1.
>
> Thierry
>
> >
> > Thanks.
> >> soc_centriq2400 = {
> >> - 'description': 'Qualcomm Centriq 2400',
> >> + 'description': 'Qualcomm Centriq 2400 (SoC v2.0)',
> >> 'implementer': '0x51',
> >> 'part_number': '0xc00',
> >> 'numa': false
> >> --
> >> 2.29.2
> >
>
> --
> Thierry Herbelot
> Senior Software Engineer
> Tel: +33 1 39 30 92 61
> http://www.6wind.com/
>
> Follow us:
> https://www.linkedin.com/company/6wind/
> https://twitter.com/6WINDsoftware
> https://www.youtube.com/user/6windsoftware
^ permalink raw reply [flat|nested] 20+ messages in thread
* [dpdk-dev] [PATCH V6] config/arm: add Qualcomm Centriq 2400 part number
2021-06-17 11:44 ` [dpdk-dev] [PATCH V5] " Thierry Herbelot
@ 2021-06-17 15:13 ` Thierry Herbelot
2021-06-18 2:09 ` Ruifeng Wang
0 siblings, 1 reply; 20+ messages in thread
From: Thierry Herbelot @ 2021-06-17 15:13 UTC (permalink / raw)
To: dev
Cc: Thierry Herbelot, Thomas Monjalon, Jerin Jacob, Ruifeng Wang,
Honnappa Nagarahalli, Juraj Linkeš
0xc00 is for "SoC 2.0" Qualcomm Centriq servers.
0x800 is for "SoC 1.1".
Cc: Jerin Jacob <jerinj@marvell.com>
Cc: Ruifeng Wang <ruifeng.wang@arm.com>
Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
--
V2: add maintainers as Cc
V3: fix meson syntax for the SoC v1.1 machine description
V4: add new soc_centriq2400_v1_1 to the supported SoC list
V5: remove 'soc_' prefix in the supported SoC list
V6: remove soc declarations for Centriq 2400 (SoC v1.1)
---
config/arm/meson.build | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index e83a56e0d589..9795ef08bc08 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -179,7 +179,8 @@ implementer_qualcomm = {
['RTE_MAX_NUMA_NODES', 1]
],
'part_number_config': {
- '0xc00': {'machine_args': ['-march=armv8-a+crc']}
+ '0x800': {'machine_args': ['-march=armv8-a+crc']},
+ '0xc00': {'machine_args': ['-march=armv8-a+crc']},
}
}
--
2.29.2
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH V6] config/arm: add Qualcomm Centriq 2400 part number
2021-06-17 15:13 ` [dpdk-dev] [PATCH V6] " Thierry Herbelot
@ 2021-06-18 2:09 ` Ruifeng Wang
2021-06-18 8:51 ` Thomas Monjalon
0 siblings, 1 reply; 20+ messages in thread
From: Ruifeng Wang @ 2021-06-18 2:09 UTC (permalink / raw)
To: Thierry Herbelot, dev
Cc: thomas, jerinj, Honnappa Nagarahalli, Juraj Linkeš, nd
> -----Original Message-----
> From: Thierry Herbelot <thierry.herbelot@6wind.com>
> Sent: Thursday, June 17, 2021 11:13 PM
> To: dev@dpdk.org
> Cc: Thierry Herbelot <thierry.herbelot@6wind.com>; thomas@monjalon.net;
> jerinj@marvell.com; Ruifeng Wang <Ruifeng.Wang@arm.com>; Honnappa
> Nagarahalli <Honnappa.Nagarahalli@arm.com>; Juraj Linkeš
> <juraj.linkes@pantheon.tech>
> Subject: [PATCH V6] config/arm: add Qualcomm Centriq 2400 part number
>
> 0xc00 is for "SoC 2.0" Qualcomm Centriq servers.
> 0x800 is for "SoC 1.1".
>
> Cc: Jerin Jacob <jerinj@marvell.com>
> Cc: Ruifeng Wang <ruifeng.wang@arm.com>
> Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
>
> Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
> --
> V2: add maintainers as Cc
> V3: fix meson syntax for the SoC v1.1 machine description
> V4: add new soc_centriq2400_v1_1 to the supported SoC list
> V5: remove 'soc_' prefix in the supported SoC list
> V6: remove soc declarations for Centriq 2400 (SoC v1.1)
> ---
> config/arm/meson.build | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> e83a56e0d589..9795ef08bc08 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -179,7 +179,8 @@ implementer_qualcomm = {
> ['RTE_MAX_NUMA_NODES', 1]
> ],
> 'part_number_config': {
> - '0xc00': {'machine_args': ['-march=armv8-a+crc']}
> + '0x800': {'machine_args': ['-march=armv8-a+crc']},
> + '0xc00': {'machine_args': ['-march=armv8-a+crc']},
Nit, redundant comma at the end of the line.
With suggested change,
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
Thanks.
> }
> }
>
> --
> 2.29.2
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH V6] config/arm: add Qualcomm Centriq 2400 part number
2021-06-18 2:09 ` Ruifeng Wang
@ 2021-06-18 8:51 ` Thomas Monjalon
2021-06-18 8:53 ` Thierry Herbelot
0 siblings, 1 reply; 20+ messages in thread
From: Thomas Monjalon @ 2021-06-18 8:51 UTC (permalink / raw)
To: Ruifeng Wang
Cc: Thierry Herbelot, dev, jerinj, Honnappa Nagarahalli,
Juraj Linkeš,
nd
18/06/2021 04:09, Ruifeng Wang:
> From: Thierry Herbelot <thierry.herbelot@6wind.com>
> > 'part_number_config': {
> > - '0xc00': {'machine_args': ['-march=armv8-a+crc']}
> > + '0x800': {'machine_args': ['-march=armv8-a+crc']},
> > + '0xc00': {'machine_args': ['-march=armv8-a+crc']},
> Nit, redundant comma at the end of the line.
What is redundant?
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH V6] config/arm: add Qualcomm Centriq 2400 part number
2021-06-18 8:51 ` Thomas Monjalon
@ 2021-06-18 8:53 ` Thierry Herbelot
2021-06-18 8:58 ` Thomas Monjalon
0 siblings, 1 reply; 20+ messages in thread
From: Thierry Herbelot @ 2021-06-18 8:53 UTC (permalink / raw)
To: Thomas Monjalon, Ruifeng Wang
Cc: dev, jerinj, Honnappa Nagarahalli, Juraj Linkeš, nd
On 6/18/21 10:51 AM, Thomas Monjalon wrote:
> 18/06/2021 04:09, Ruifeng Wang:
>> From: Thierry Herbelot <thierry.herbelot@6wind.com>
>>> 'part_number_config': {
>>> - '0xc00': {'machine_args': ['-march=armv8-a+crc']}
>>> + '0x800': {'machine_args': ['-march=armv8-a+crc']},
>>> + '0xc00': {'machine_args': ['-march=armv8-a+crc']},
>> Nit, redundant comma at the end of the line.
>
> What is redundant?
The comma at the end of the second line is not necessary.
Thierry
--
Thierry Herbelot
Senior Software Engineer
Tel: +33 1 39 30 92 61
http://www.6wind.com/
Follow us:
https://www.linkedin.com/company/6wind/
https://twitter.com/6WINDsoftware
https://www.youtube.com/user/6windsoftware
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH V6] config/arm: add Qualcomm Centriq 2400 part number
2021-06-18 8:53 ` Thierry Herbelot
@ 2021-06-18 8:58 ` Thomas Monjalon
2021-06-21 1:52 ` Ruifeng Wang
0 siblings, 1 reply; 20+ messages in thread
From: Thomas Monjalon @ 2021-06-18 8:58 UTC (permalink / raw)
To: Ruifeng Wang, Thierry Herbelot
Cc: dev, jerinj, Honnappa Nagarahalli, Juraj Linkeš, nd
18/06/2021 10:53, Thierry Herbelot:
> On 6/18/21 10:51 AM, Thomas Monjalon wrote:
> > 18/06/2021 04:09, Ruifeng Wang:
> >> From: Thierry Herbelot <thierry.herbelot@6wind.com>
> >>> 'part_number_config': {
> >>> - '0xc00': {'machine_args': ['-march=armv8-a+crc']}
> >>> + '0x800': {'machine_args': ['-march=armv8-a+crc']},
> >>> + '0xc00': {'machine_args': ['-march=armv8-a+crc']},
> >> Nit, redundant comma at the end of the line.
> >
> > What is redundant?
>
> The comma at the end of the second line is not necessary.
It is a good practice to have comma like other lines,
so no need to update this line when adding more.
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH V6] config/arm: add Qualcomm Centriq 2400 part number
2021-06-18 8:58 ` Thomas Monjalon
@ 2021-06-21 1:52 ` Ruifeng Wang
2021-07-09 15:27 ` Thomas Monjalon
0 siblings, 1 reply; 20+ messages in thread
From: Ruifeng Wang @ 2021-06-21 1:52 UTC (permalink / raw)
To: thomas, Thierry Herbelot
Cc: dev, jerinj, Honnappa Nagarahalli, Juraj Linkeš, nd, nd
> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Friday, June 18, 2021 4:58 PM
> To: Ruifeng Wang <Ruifeng.Wang@arm.com>; Thierry Herbelot
> <thierry.herbelot@6wind.com>
> Cc: dev@dpdk.org; jerinj@marvell.com; Honnappa Nagarahalli
> <Honnappa.Nagarahalli@arm.com>; Juraj Linkeš
> <juraj.linkes@pantheon.tech>; nd <nd@arm.com>
> Subject: Re: [PATCH V6] config/arm: add Qualcomm Centriq 2400 part
> number
>
> 18/06/2021 10:53, Thierry Herbelot:
> > On 6/18/21 10:51 AM, Thomas Monjalon wrote:
> > > 18/06/2021 04:09, Ruifeng Wang:
> > >> From: Thierry Herbelot <thierry.herbelot@6wind.com>
> > >>> 'part_number_config': {
> > >>> - '0xc00': {'machine_args': ['-march=armv8-a+crc']}
> > >>> + '0x800': {'machine_args': ['-march=armv8-a+crc']},
> > >>> + '0xc00': {'machine_args': ['-march=armv8-a+crc']},
> > >> Nit, redundant comma at the end of the line.
> > >
> > > What is redundant?
> >
> > The comma at the end of the second line is not necessary.
>
> It is a good practice to have comma like other lines, so no need to update this
> line when adding more.
>
Looked at style in the rest of the file. Just wanted them to be aligned.
I'm fine with a trailing comma at the last line.
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [dpdk-dev] [PATCH V6] config/arm: add Qualcomm Centriq 2400 part number
2021-06-21 1:52 ` Ruifeng Wang
@ 2021-07-09 15:27 ` Thomas Monjalon
0 siblings, 0 replies; 20+ messages in thread
From: Thomas Monjalon @ 2021-07-09 15:27 UTC (permalink / raw)
To: Thierry Herbelot
Cc: dev, jerinj, Honnappa Nagarahalli, Juraj Linkeš, nd, Ruifeng Wang
21/06/2021 03:52, Ruifeng Wang:
> From: Thomas Monjalon <thomas@monjalon.net>
> > 18/06/2021 10:53, Thierry Herbelot:
> > > On 6/18/21 10:51 AM, Thomas Monjalon wrote:
> > > > 18/06/2021 04:09, Ruifeng Wang:
> > > >> From: Thierry Herbelot <thierry.herbelot@6wind.com>
> > > >>> 'part_number_config': {
> > > >>> - '0xc00': {'machine_args': ['-march=armv8-a+crc']}
> > > >>> + '0x800': {'machine_args': ['-march=armv8-a+crc']},
> > > >>> + '0xc00': {'machine_args': ['-march=armv8-a+crc']},
> > > >> Nit, redundant comma at the end of the line.
> > > >
> > > > What is redundant?
> > >
> > > The comma at the end of the second line is not necessary.
> >
> > It is a good practice to have comma like other lines, so no need to update this
> > line when adding more.
> >
> Looked at style in the rest of the file. Just wanted them to be aligned.
> I'm fine with a trailing comma at the last line.
>
> Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
Applied, thanks
^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2021-07-09 15:27 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-05-25 8:16 [dpdk-dev] [PATCH] config/arm: add Qualcomm Centriq 2400 part number Thierry Herbelot
2021-05-25 8:18 ` Thomas Monjalon
2021-05-25 8:24 ` [dpdk-dev] [PATCH v2] " Thierry Herbelot
2021-06-17 7:06 ` Thomas Monjalon
2021-06-17 7:21 ` David Marchand
2021-06-17 7:24 ` Ruifeng Wang
2021-06-17 7:28 ` Ruifeng Wang
2021-06-17 8:16 ` [dpdk-dev] [PATCH V3] " Thierry Herbelot
2021-06-17 10:03 ` Ruifeng Wang
2021-06-17 11:24 ` Thierry Herbelot
2021-06-17 14:46 ` Ruifeng Wang
2021-06-17 11:36 ` [dpdk-dev] [PATCH V4] " Thierry Herbelot
2021-06-17 11:44 ` [dpdk-dev] [PATCH V5] " Thierry Herbelot
2021-06-17 15:13 ` [dpdk-dev] [PATCH V6] " Thierry Herbelot
2021-06-18 2:09 ` Ruifeng Wang
2021-06-18 8:51 ` Thomas Monjalon
2021-06-18 8:53 ` Thierry Herbelot
2021-06-18 8:58 ` Thomas Monjalon
2021-06-21 1:52 ` Ruifeng Wang
2021-07-09 15:27 ` Thomas Monjalon
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