From: Ruifeng Wang <Ruifeng.Wang@arm.com>
To: Thierry Herbelot <thierry.herbelot@6wind.com>,
"dev@dpdk.org" <dev@dpdk.org>
Cc: "thomas@monjalon.net" <thomas@monjalon.net>,
"jerinj@marvell.com" <jerinj@marvell.com>,
"Honnappa Nagarahalli" <Honnappa.Nagarahalli@arm.com>,
"Juraj Linkeš" <juraj.linkes@pantheon.tech>, nd <nd@arm.com>
Subject: Re: [dpdk-dev] [PATCH V3] config/arm: add Qualcomm Centriq 2400 part number
Date: Thu, 17 Jun 2021 10:03:58 +0000 [thread overview]
Message-ID: <AM5PR0802MB2465D72ED4838AB96320055D9E0E9@AM5PR0802MB2465.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <876d348bb6ab493f404c2c1f288262ff3112cada.1623917721.git.thierry.herbelot@6wind.com>
> -----Original Message-----
> From: Thierry Herbelot <thierry.herbelot@6wind.com>
> Sent: Thursday, June 17, 2021 4:16 PM
> To: dev@dpdk.org
> Cc: Thierry Herbelot <thierry.herbelot@6wind.com>; thomas@monjalon.net;
> jerinj@marvell.com; Ruifeng Wang <Ruifeng.Wang@arm.com>; Honnappa
> Nagarahalli <Honnappa.Nagarahalli@arm.com>; Juraj Linkeš
> <juraj.linkes@pantheon.tech>
> Subject: [PATCH V3] config/arm: add Qualcomm Centriq 2400 part number
>
> 0xc00 is for "SoC 2.0" Qualcomm Centriq servers.
> 0x800 is for "SoC 1.1".
>
> Cc: Jerin Jacob <jerinj@marvell.com>
> Cc: Ruifeng Wang <ruifeng.wang@arm.com>
> Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
>
> Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
> --
> V2: add maintainers as Cc
> V3: fix meson syntax for the SoC v1.1 machine description
> ---
> config/arm/meson.build | 12 ++++++++++--
> 1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> e83a56e0d589..b33303d09023 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -179,7 +179,8 @@ implementer_qualcomm = {
> ['RTE_MAX_NUMA_NODES', 1]
> ],
> 'part_number_config': {
> - '0xc00': {'machine_args': ['-march=armv8-a+crc']}
> + '0x800': {'machine_args': ['-march=armv8-a+crc']},
> + '0xc00': {'machine_args': ['-march=armv8-a+crc']},
> }
> }
>
> @@ -223,8 +224,15 @@ soc_bluefield = {
> 'numa': false
> }
>
> +soc_centriq2400_v1_1 = {
> + 'description': 'Qualcomm Centriq 2400 (SoC v1.1)',
> + 'implementer': '0x51',
> + 'part_number': '0x800',
> + 'numa': false
> +}
> +
What is the difference between SoC v1.1 and SoC v2.0. Do they have different instruction levels or extensions?
They have the same machine_args. I think the two part numbers can share the same soc_xx. Because cross built binary can run on both SoCs.
What do you think?
Thanks.
> soc_centriq2400 = {
> - 'description': 'Qualcomm Centriq 2400',
> + 'description': 'Qualcomm Centriq 2400 (SoC v2.0)',
> 'implementer': '0x51',
> 'part_number': '0xc00',
> 'numa': false
> --
> 2.29.2
next prev parent reply other threads:[~2021-06-17 10:04 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-25 8:16 [dpdk-dev] [PATCH] " Thierry Herbelot
2021-05-25 8:18 ` Thomas Monjalon
2021-05-25 8:24 ` [dpdk-dev] [PATCH v2] " Thierry Herbelot
2021-06-17 7:06 ` Thomas Monjalon
2021-06-17 7:21 ` David Marchand
2021-06-17 7:24 ` Ruifeng Wang
2021-06-17 7:28 ` Ruifeng Wang
2021-06-17 8:16 ` [dpdk-dev] [PATCH V3] " Thierry Herbelot
2021-06-17 10:03 ` Ruifeng Wang [this message]
2021-06-17 11:24 ` Thierry Herbelot
2021-06-17 14:46 ` Ruifeng Wang
2021-06-17 11:36 ` [dpdk-dev] [PATCH V4] " Thierry Herbelot
2021-06-17 11:44 ` [dpdk-dev] [PATCH V5] " Thierry Herbelot
2021-06-17 15:13 ` [dpdk-dev] [PATCH V6] " Thierry Herbelot
2021-06-18 2:09 ` Ruifeng Wang
2021-06-18 8:51 ` Thomas Monjalon
2021-06-18 8:53 ` Thierry Herbelot
2021-06-18 8:58 ` Thomas Monjalon
2021-06-21 1:52 ` Ruifeng Wang
2021-07-09 15:27 ` Thomas Monjalon
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