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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4b682d94-4c90-442f-56b3-08d7e0582c17 X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Apr 2020 09:42:39.7265 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: fGfPzWs+68Xq3KsNdwI+ywOPgwO1sDQY7xqckVVM30LE3XNR/CoS9444Vuinp8SYTS6Ia7rNKs4wtgSXEL/ePg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR05MB5253 Subject: Re: [dpdk-dev] [dpdk-dev v4 1/3] ethdev: add new RSS offload types X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Jeff,=20 PSB Best, Ori > -----Original Message----- > From: Jeff Guo > Sent: Tuesday, April 14, 2020 8:42 PM > To: Ori Kam ; bernard.iremonger@intel.com; > xiaolong.ye@intel.com; qi.z.zhang@intel.com > Cc: dev@dpdk.org; jingjing.wu@intel.com; yahui.cao@intel.com; > simei.su@intel.com; jia.guo@intel.com > Subject: [dpdk-dev v4 1/3] ethdev: add new RSS offload types >=20 > Defines some new RSS offload types for ETH/SVLAN/CVLAN/GTPU/L2TPV3/ > ESP/AH/PFCP. >=20 > Signed-off-by: Jeff Guo > Reviewed-by: Qi Zhang > --- > v4->v3: > no change > --- > lib/librte_ethdev/rte_ethdev.h | 11 ++++++++++- > 1 file changed, 10 insertions(+), 1 deletion(-) >=20 > diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethde= v.h > index d1a593ad1..efe705ff0 100644 > --- a/lib/librte_ethdev/rte_ethdev.h > +++ b/lib/librte_ethdev/rte_ethdev.h > @@ -511,6 +511,13 @@ struct rte_eth_rss_conf { > #define ETH_RSS_GENEVE (1ULL << 20) > #define ETH_RSS_NVGRE (1ULL << 21) > #define ETH_RSS_GTPU (1ULL << 23) > +#define ETH_RSS_ETH (1ULL << 24) > +#define ETH_RSS_S_VLAN (1ULL << 25) > +#define ETH_RSS_C_VLAN (1ULL << 26) > +#define ETH_RSS_ESP (1ULL << 27) > +#define ETH_RSS_AH (1ULL << 28) > +#define ETH_RSS_L2TPV3 (1ULL << 29) > +#define ETH_RSS_PFCP (1ULL << 30) >=20 > /* > * We use the following macros to combine with above ETH_RSS_* for > @@ -524,7 +531,9 @@ struct rte_eth_rss_conf { > #define ETH_RSS_L3_SRC_ONLY (1ULL << 63) > #define ETH_RSS_L3_DST_ONLY (1ULL << 62) > #define ETH_RSS_L4_SRC_ONLY (1ULL << 61) > -#define ETH_RSS_L4_DST_ONLY (1ULL << 60) > +#define ETH_RSS_L4_DST_ONLY (1ULL << 60) > +#define ETH_RSS_ETH_SRC_ONLY (1ULL << 59) > +#define ETH_RSS_ETH_DST_ONLY (1ULL << 58) >=20 Why not change to L2_RSS_SRC_ONLY? Same for DST? Also if it is not ABI/API change I would suggest to move the ETH defines to be 63. > /** > * For input set change of hash filter, if SRC_ONLY and DST_ONLY of > -- > 2.20.1