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Tue, 11 Dec 2018 06:02:02 +0000 From: Honnappa Nagarahalli To: "Gavin Hu (Arm Technology China)" , "dev@dpdk.org" CC: "thomas@monjalon.net" , "jerin.jacob@caviumnetworks.com" , "hemant.agrawal@nxp.com" , "Gavin Hu (Arm Technology China)" , "stable@dpdk.org" , Bruce Richardson , nd , nd Thread-Topic: [PATCH v1] config: enable c11 memory model for ARMv8 meson Thread-Index: AQHUkQV0ll9rAUnKtkSMA/itYx1pIKV5C8dA Date: Tue, 11 Dec 2018 06:02:01 +0000 Message-ID: References: <1544500550-193166-1-git-send-email-gavin.hu@arm.com> In-Reply-To: <1544500550-193166-1-git-send-email-gavin.hu@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [217.140.111.135] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; AM6PR08MB4199; 6:ccNXnvVx9WVdzDCjdAprSU2NMTVL5HB2rS1kNRxw40iw6c+7heLEFw+IBF1NP+nQc5ha9QBXDAKNP5fePEn+YkpDc1JmUxSG+N6dw0QSk2/R5pZJltIxYLhuKuoapK03viqGe/ojKFe9FEeu7s4dBknYIvNErVGQJobFcwDIac7FNGUwh7/V/Omj4s8iHjZRMcri9FhNFn287y7cfuuhoUl62BgzbkV3oy2fXCTjlhenv5d1n74/95D0HwhP7OJg1u4YTr1jojvVhZYXUfOvCQi7yq5eWgUtK8fQkQKOYJKc0nxBj/w7caxRSXT/tqC9So+fo+00INlObIysybI4tfbtFAMD34175rok3ZJLDsWpVcNXu0edMNDQka1e0YtoZaWA+X1/NK74lc524vlIIJr/9SZjBHKp5nIp9FhmrzWQS6VHMPhwtDM9wIEWJR02wQFEO0RPbic1Z0HLdYPP/A==; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6da695a9-aee7-44af-7988-08d65f2e2b62 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Dec 2018 06:02:01.9201 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR08MB4199 Subject: Re: [dpdk-dev] [PATCH v1] config: enable c11 memory model for ARMv8 meson X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 11 Dec 2018 06:02:03 -0000 + Bruce > -----Original Message----- > From: Gavin Hu > Sent: Monday, December 10, 2018 9:56 PM > To: dev@dpdk.org > Cc: thomas@monjalon.net; jerin.jacob@caviumnetworks.com; > hemant.agrawal@nxp.com; Honnappa Nagarahalli > ; Gavin Hu (Arm Technology China) > ; stable@dpdk.org > Subject: [PATCH v1] config: enable c11 memory model for ARMv8 meson >=20 > This patch makes the configuration based on makefile and the configuratio= n > based on meson to be the same. >=20 > Fixes: c6e536e38437 ("build: add more implementers IDs and PNs for ARM") > Cc: stable@dpdk.org >=20 > Signed-off-by: Gavin Hu > Reviewed-by: Ruifeng Wang > Reviewed-by: Honnappa Nagarahalli > --- > config/arm/meson.build | 3 +++ > 1 file changed, 3 insertions(+) >=20 > diff --git a/config/arm/meson.build b/config/arm/meson.build index > 3f91725..dae55d6 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -47,6 +47,7 @@ flags_common_default =3D [ flags_generic =3D [ > ['RTE_MACHINE', '"armv8a"'], > ['RTE_MAX_LCORE', 256], > + ['RTE_USE_C11_MEM_MODEL', true], > ['RTE_CACHE_LINE_SIZE', 128]] > flags_cavium =3D [ > ['RTE_MACHINE', '"thunderx"'], > @@ -57,11 +58,13 @@ flags_cavium =3D [ > ['RTE_USE_C11_MEM_MODEL', false]] > flags_dpaa =3D [ > ['RTE_MACHINE', '"dpaa"'], > + ['RTE_USE_C11_MEM_MODEL', true], > ['RTE_CACHE_LINE_SIZE', 64], > ['RTE_MAX_NUMA_NODES', 1], > ['RTE_MAX_LCORE', 16]] > flags_dpaa2 =3D [ > ['RTE_MACHINE', '"dpaa2"'], > + ['RTE_USE_C11_MEM_MODEL', true], > ['RTE_CACHE_LINE_SIZE', 64], > ['RTE_MAX_NUMA_NODES', 1], > ['RTE_MAX_LCORE', 16], > -- > 2.7.4