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Mon, 5 Nov 2018 21:51:42 +0000 From: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> To: =?iso-8859-1?Q?Mattias_R=F6nnblom?= <mattias.ronnblom@ericsson.com>, Thomas Monjalon <thomas@monjalon.net>, Jerin Jacob <jerin.jacob@caviumnetworks.com> CC: "Gavin Hu (Arm Technology China)" <Gavin.Hu@arm.com>, "dev@dpdk.org" <dev@dpdk.org>, "stable@dpdk.org" <stable@dpdk.org>, Ola Liljedahl <Ola.Liljedahl@arm.com>, "olivier.matz@6wind.com" <olivier.matz@6wind.com>, "chaozhu@linux.vnet.ibm.com" <chaozhu@linux.vnet.ibm.com>, "bruce.richardson@intel.com" <bruce.richardson@intel.com>, "konstantin.ananyev@intel.com" <konstantin.ananyev@intel.com>, nd <nd@arm.com> Thread-Topic: [dpdk-dev] [PATCH 1/2] ring: synchronize the load and store of the tail Thread-Index: AQHUbgeZgXYg3h5Zpk+L4BhhMKuRSaU+hBlwgAMX72A= Date: Mon, 5 Nov 2018 21:51:42 +0000 Message-ID: <AM6PR08MB3672A936960FCEACC700AB1498CA0@AM6PR08MB3672.eurprd08.prod.outlook.com> References: <1537172244-64874-2-git-send-email-gavin.hu@arm.com> <1874944.OrACW1nkDZ@xps> <20181027150024.GA2294@jerin> <17713879.gC9jYcxDUo@xps> <HE1PR0701MB239463577089E46983B2371CE1C80@HE1PR0701MB2394.eurprd07.prod.outlook.com> In-Reply-To: <HE1PR0701MB239463577089E46983B2371CE1C80@HE1PR0701MB2394.eurprd07.prod.outlook.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Honnappa.Nagarahalli@arm.com; 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PCL:0; RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020); SRVR:AM6PR08MB3095; x-ms-traffictypediagnostic: AM6PR08MB3095: nodisclaimer: True x-microsoft-antispam-prvs: <AM6PR08MB30956AA8D638FA145C314F0498CA0@AM6PR08MB3095.eurprd08.prod.outlook.com> x-exchange-antispam-report-test: UriScan:; x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(8211001083)(6040522)(2401047)(5005006)(8121501046)(93006095)(93001095)(10201501046)(3002001)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095); SRVR:AM6PR08MB3095; BCL:0; PCL:0; RULEID:; SRVR:AM6PR08MB3095; x-forefront-prvs: 08476BC6EF x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(136003)(376002)(366004)(39860400002)(396003)(346002)(189003)(199004)(71190400001)(446003)(55016002)(6246003)(7736002)(86362001)(4326008)(53936002)(5660300001)(66066001)(6506007)(478600001)(256004)(476003)(71200400001)(3846002)(14444005)(11346002)(486006)(9686003)(305945005)(74316002)(6116002)(2906002)(26005)(72206003)(229853002)(6436002)(54906003)(76176011)(25786009)(93886005)(110136005)(81156014)(102836004)(186003)(81166006)(97736004)(99286004)(68736007)(33656002)(316002)(14454004)(8936002)(105586002)(2900100001)(7696005)(106356001); DIR:OUT; SFP:1101; SCL:1; SRVR:AM6PR08MB3095; H:AM6PR08MB3672.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: OyM7OX3Zz0nrFhrW9JsiMTGFJgx5FsD4onSBJIRRLwpkGFv5cT+7gYT4luQd8OtGBlWgTCtUaYpQ1+roaGHs4PlQK+l4pwUbSrkWUaoDBj1JO/40EDR8Nct0upRtn7AIDa0/rqj1sJtdIBsTSqe0sADToU6Q6ybjQPteU2VqNCAujAqFbgBj50Aq0bCHNqimmgUTVCIXTioNZWmMEIIdN4gUvoNPMvSCPtfkhBGlTWg0b9L9OXT6zwL7McvuRuW5MGQr+57scDz6SS67oK9/zF4iqx1vS5/32xuzsx8Ye8J6MlKenbPx6RT4ft200vMjTkSURzzqsLUM2IG8t0ljCeiMZ1yoc1JnKu8ta81FXDs= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: d40869dd-709b-47fd-f56e-08d64368df91 X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Nov 2018 21:51:42.5227 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR08MB3095 Subject: Re: [dpdk-dev] [PATCH 1/2] ring: synchronize the load and store of the tail X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> X-List-Received-Date: Mon, 05 Nov 2018 21:51:44 -0000 > > > > 27/10/2018 17:00, Jerin Jacob: > > > From: Thomas Monjalon <thomas@monjalon.net> > > > > The thread is totally messed up because: > > > > - there is no cover letter > > > > - some different series (testpmd, i40e and doc) are in the > > > > same > > thread > > > > - v4 replies to a different series > > > > - this version should be a v5 but has no number > > > > - this version replies to the v3 > > > > - patchwork still shows v3 and "v5" > > > > - replies from Ola are not quoting previous discussion > > > > > > > > Because of all of this, it is really difficult to follow. > > > > This is probably the reason of the lack of review outside of Arm. > > > > > > > > One more issue: you must Cc the relevant maintainers. > > > > Here: > > > > - Olivier for rte_ring > > > > - Chao for IBM platform > > > > - Bruce and Konstantin for x86 > > > > > > > > Guys, it is really cool to have more Arm developpers in DPDK. > > > > But please consider better formatting your discussions, it is > > > > really important in our contribution workflow. > > > > > > > > I don't know what to do. > > > > I suggest to wait for more feedbacks and integrate it in -rc2. > > > > > > This series has been acked and tested. Sure, if we are looking for > > > some more feedback we can push to -rc2 if not it a good candidate to > > > be selected for -rc1. > > > > It has been acked and tested only for Arm platforms. > > And Olivier, the ring maintainer, was not Cc. > > > > I feel it is not enough. > > >=20 > I've just run an out-of-tree test program I have for the DSW scheduler, w= hich > verify scheduler atomic semantics. The results are: > Non-C11 mode: pass > C11 mode before this patch set: fail > C11 mode after this patch set: pass >=20 > This suggests the current C11 mode is broken even on x86_64. I haven't > been following this thread closely, so maybe this is known already. >=20 > I've also run an out-of-tree DSW throughput benchmark, and I've found tha= t > going from Non-C11 to C11 gives a 4% slowdown. After this patch, the > slowdown is only 2,8%. This is interesting. The general understanding seems to be that C11 atomics= should not add any additional instructions on x86. But, we still see some = drop in performance. Is this attributed to compiler not being allowed to re= -order? >=20 > GCC 7.3.0 and a Skylake x86_64.