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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(4636009)(46966006)(36840700001)(2906002)(54906003)(110136005)(52536014)(5660300002)(186003)(36860700001)(336012)(55016002)(8936002)(81166007)(9686003)(86362001)(4326008)(498600001)(70206006)(83380400001)(70586007)(82310400003)(7696005)(356005)(26005)(966005)(6506007)(8676002)(47076005)(33656002); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2021 17:08:17.0723 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0ea5be6e-bed7-4db3-4592-08d9149f5ebb X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT022.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR08MB4111 Subject: Re: [dpdk-dev] [EXT] Re: [PATCH] config/arm: add ability to express arch extensions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > >> > >> > > >> > The patch still holds true for CRC though as it is listed > >> > separately below > >> > https://urldefense.proofpoint.com/v2/url?u=3Dhttps- > >3A__developer.arm.com_architectures_cpu-2Darchitecture_a- > >2D&d=3DDwIFAg&c=3DnKjWec2b6R0mOyPaz7xtfQ&r=3DE3SgYMjtKCMVsB- > >fmvgGV3o- > >g_fjLhk5Pupi9ijohpc&m=3Di3kC8htMiHjXMoJWUn6QlDVZQCblbFrIJyMcW > >d9nAmM&s=3DfA4SM6O3iC2HXIK1qSbOHzxVeHoYqcfUebEOwioHC7c&e=3D > >> > profile/exploration-tools/feature-names-for-a-profile > >CRC is mandatory starting in V8.1, refer to Arm-ARM document. > > > >> > > >> > Also, looks like sve2 support in n2 core might be optional as per > >above doc? > >> I need to check on this. Some of the info here might not be public yet= . > >I found [1]. SVE2 is mandatory feature. > > >=20 > I see thanks for the info I will remove extension from cnxk. >=20 > Do you think the extension infra is still useful for other cases? i.e. ol= der cores > or cases where vendor wants to enable some extensions by default? >=20 > I found a document[1] which describes about extensions not enabled by > default but supported by a given march. > In case of n2 I think memory tagging is one such feature I think the reference is providing a different information than what you ar= e trying to achieve here. It looks like you are trying to address a use case where in the same CPU IP= has different features enabled/disabled on different SoCs. This is a valid use case from crypto perspective (due to export control rea= sons) where-in 2 different SoCs might have crypto enabled/disabled. I am no= t sure if other features can be enabled/disabled. But, Crypto feature is a = good enough reason to address such a use case. IMO, we should capture the SoC specific details in SoC specific files, in = this case in 'arm64_cn10k_linux_gcc'. I believe there were some challenges = in doing this. Juraj, do you remember the exact issue? >=20 > [1]https://developer.arm.com/tools-and-software/open-source- > software/developer-tools/gnu-toolchain/architecture-support >=20 >=20 > >[1] https://urldefense.proofpoint.com/v2/url?u=3Dhttps- > >3A__developer.arm.com_ip- > >2Dproducts_processors_neoverse_neoverse- > >2Dn2&d=3DDwIFAg&c=3DnKjWec2b6R0mOyPaz7xtfQ&r=3DE3SgYMjtKCMVsB- > >fmvgGV3o- > >g_fjLhk5Pupi9ijohpc&m=3Di3kC8htMiHjXMoJWUn6QlDVZQCblbFrIJyMcW > >d9nAmM&s=3DkP_X-Co0cl4pZ64BZqy5rAFUlkMZE-3EhTVBabm3SW8&e=3D > > > >