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X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM7PR08MB5446 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Stephen Hemminger > Sent: Saturday, October 21, 2023 5:41 AM > To: dev@dpdk.org > Cc: Stephen Hemminger ; Cristian > Dumitrescu ; Joyce Kong > > Subject: [PATCH v2 01/14] eal: make bitops a stable API > > These were added in 20.05 release. > > Signed-off-by: Stephen Hemminger Reviewed-by: Joyce Kong > --- > lib/eal/include/rte_bitmap.h | 8 -------- lib/eal/include/rte_bitops.h= | 40 ----- > ------------------------------- > 2 files changed, 48 deletions(-) > > diff --git a/lib/eal/include/rte_bitmap.h b/lib/eal/include/rte_bitmap.h = index > 46a822768d50..ec819595624c 100644 > --- a/lib/eal/include/rte_bitmap.h > +++ b/lib/eal/include/rte_bitmap.h > @@ -203,9 +203,6 @@ rte_bitmap_init(uint32_t n_bits, uint8_t *mem, > uint32_t mem_size) } > > /** > - * @warning > - * @b EXPERIMENTAL: this API may change without prior notice. > - * > * Bitmap clear slab overhead bits. > * > * @param slabs > @@ -215,7 +212,6 @@ rte_bitmap_init(uint32_t n_bits, uint8_t *mem, > uint32_t mem_size) > * @param pos > * The start bit position in the slabs to be cleared. > */ > -__rte_experimental > static inline void > __rte_bitmap_clear_slab_overhead_bits(uint64_t *slabs, uint32_t slab_siz= e, > uint32_t pos) > @@ -235,9 +231,6 @@ __rte_bitmap_clear_slab_overhead_bits(uint64_t > *slabs, uint32_t slab_size, } > > /** > - * @warning > - * @b EXPERIMENTAL: this API may change without prior notice. > - * > * Bitmap initialization with all bits set > * > * @param n_bits > @@ -249,7 +242,6 @@ __rte_bitmap_clear_slab_overhead_bits(uint64_t > *slabs, uint32_t slab_size, > * @return > * Handle to bitmap instance. > */ > -__rte_experimental > static inline struct rte_bitmap * > rte_bitmap_init_with_all_set(uint32_t n_bits, uint8_t *mem, uint32_t > mem_size) { diff --git a/lib/eal/include/rte_bitops.h > b/lib/eal/include/rte_bitops.h index 6b8ae8d3acf6..29d24b3a780e 100644 > --- a/lib/eal/include/rte_bitops.h > +++ b/lib/eal/include/rte_bitops.h > @@ -42,9 +42,6 @@ extern "C" { > /*------------------------ 32-bit relaxed operations -------------------= -----*/ > > /** > - * @warning > - * @b EXPERIMENTAL: this API may change, or be removed, without prior > notice > - * > * Get the target bit from a 32-bit value without memory ordering. > * > * @param nr > @@ -54,7 +51,6 @@ extern "C" { > * @return > * The target bit. > */ > -__rte_experimental > static inline uint32_t > rte_bit_relaxed_get32(unsigned int nr, volatile uint32_t *addr) { @@ -6= 5,9 > +61,6 @@ rte_bit_relaxed_get32(unsigned int nr, volatile uint32_t *addr) = } > > /** > - * @warning > - * @b EXPERIMENTAL: this API may change, or be removed, without prior > notice > - * > * Set the target bit in a 32-bit value to 1 without memory ordering. > * > * @param nr > @@ -75,7 +68,6 @@ rte_bit_relaxed_get32(unsigned int nr, volatile uint32_= t > *addr) > * @param addr > * The address holding the bit. > */ > -__rte_experimental > static inline void > rte_bit_relaxed_set32(unsigned int nr, volatile uint32_t *addr) { @@ -8= 6,9 > +78,6 @@ rte_bit_relaxed_set32(unsigned int nr, volatile uint32_t *addr) = } > > /** > - * @warning > - * @b EXPERIMENTAL: this API may change, or be removed, without prior > notice > - * > * Clear the target bit in a 32-bit value to 0 without memory ordering. > * > * @param nr > @@ -96,7 +85,6 @@ rte_bit_relaxed_set32(unsigned int nr, volatile uint32_= t > *addr) > * @param addr > * The address holding the bit. > */ > -__rte_experimental > static inline void > rte_bit_relaxed_clear32(unsigned int nr, volatile uint32_t *addr) { @@ = -107,9 > +95,6 @@ rte_bit_relaxed_clear32(unsigned int nr, volatile uint32_t *addr= ) } > > /** > - * @warning > - * @b EXPERIMENTAL: this API may change, or be removed, without prior > notice > - * > * Return the original bit from a 32-bit value, then set it to 1 without > * memory ordering. > * > @@ -120,7 +105,6 @@ rte_bit_relaxed_clear32(unsigned int nr, volatile > uint32_t *addr) > * @return > * The original bit. > */ > -__rte_experimental > static inline uint32_t > rte_bit_relaxed_test_and_set32(unsigned int nr, volatile uint32_t *addr) > { @@ -133,9 +117,6 @@ rte_bit_relaxed_test_and_set32(unsigned int nr, > volatile uint32_t *addr) } > > /** > - * @warning > - * @b EXPERIMENTAL: this API may change, or be removed, without prior > notice > - * > * Return the original bit from a 32-bit value, then clear it to 0 witho= ut > * memory ordering. > * > @@ -146,7 +127,6 @@ rte_bit_relaxed_test_and_set32(unsigned int nr, > volatile uint32_t *addr) > * @return > * The original bit. > */ > -__rte_experimental > static inline uint32_t > rte_bit_relaxed_test_and_clear32(unsigned int nr, volatile uint32_t *add= r) > { @@ -161,9 +141,6 @@ rte_bit_relaxed_test_and_clear32(unsigned int nr, > volatile uint32_t *addr) > /*------------------------ 64-bit relaxed operations -------------------= -----*/ > > /** > - * @warning > - * @b EXPERIMENTAL: this API may change, or be removed, without prior > notice > - * > * Get the target bit from a 64-bit value without memory ordering. > * > * @param nr > @@ -173,7 +150,6 @@ rte_bit_relaxed_test_and_clear32(unsigned int nr, > volatile uint32_t *addr) > * @return > * The target bit. > */ > -__rte_experimental > static inline uint64_t > rte_bit_relaxed_get64(unsigned int nr, volatile uint64_t *addr) { @@ -1= 84,9 > +160,6 @@ rte_bit_relaxed_get64(unsigned int nr, volatile uint64_t *addr)= } > > /** > - * @warning > - * @b EXPERIMENTAL: this API may change, or be removed, without prior > notice > - * > * Set the target bit in a 64-bit value to 1 without memory ordering. > * > * @param nr > @@ -194,7 +167,6 @@ rte_bit_relaxed_get64(unsigned int nr, volatile > uint64_t *addr) > * @param addr > * The address holding the bit. > */ > -__rte_experimental > static inline void > rte_bit_relaxed_set64(unsigned int nr, volatile uint64_t *addr) { @@ -2= 05,9 > +177,6 @@ rte_bit_relaxed_set64(unsigned int nr, volatile uint64_t *addr)= } > > /** > - * @warning > - * @b EXPERIMENTAL: this API may change, or be removed, without prior > notice > - * > * Clear the target bit in a 64-bit value to 0 without memory ordering. > * > * @param nr > @@ -215,7 +184,6 @@ rte_bit_relaxed_set64(unsigned int nr, volatile > uint64_t *addr) > * @param addr > * The address holding the bit. > */ > -__rte_experimental > static inline void > rte_bit_relaxed_clear64(unsigned int nr, volatile uint64_t *addr) { @@ = -226,9 > +194,6 @@ rte_bit_relaxed_clear64(unsigned int nr, volatile uint64_t *add= r) } > > /** > - * @warning > - * @b EXPERIMENTAL: this API may change, or be removed, without prior > notice > - * > * Return the original bit from a 64-bit value, then set it to 1 without > * memory ordering. > * > @@ -239,7 +204,6 @@ rte_bit_relaxed_clear64(unsigned int nr, volatile > uint64_t *addr) > * @return > * The original bit. > */ > -__rte_experimental > static inline uint64_t > rte_bit_relaxed_test_and_set64(unsigned int nr, volatile uint64_t *addr) > { @@ -252,9 +216,6 @@ rte_bit_relaxed_test_and_set64(unsigned int nr, > volatile uint64_t *addr) } > > /** > - * @warning > - * @b EXPERIMENTAL: this API may change, or be removed, without prior > notice > - * > * Return the original bit from a 64-bit value, then clear it to 0 witho= ut > * memory ordering. > * > @@ -265,7 +226,6 @@ rte_bit_relaxed_test_and_set64(unsigned int nr, > volatile uint64_t *addr) > * @return > * The original bit. > */ > -__rte_experimental > static inline uint64_t > rte_bit_relaxed_test_and_clear64(unsigned int nr, volatile uint64_t *add= r) { > -- > 2.39.2 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