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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AS8PR08MB7080.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: c1f1a7cc-28df-434a-d14f-08dbd53e8ca0 X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Oct 2023 09:41:22.6845 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: BJv9OhgSZo/0uYKm1okcO+hjokLSbjVuJt0HhGgTU3mm2J9s5Rei8tRocer8rnEOyyHF2tJpSJfL1W7e6wMgew== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS1PR08MB7588 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Tyler Retzlaff > Sent: Wednesday, October 18, 2023 4:31 AM > To: dev@dpdk.org > Cc: Akhil Goyal ; Anatoly Burakov ; Andrew > Rybchenko ; Bruce Richardson ; > Chenbo Xia ; Ciara Power ; D= avid Christensen > ; David Hunt ; Dmitry Kozly= uk > ; Dmitry Malloy ; Elena = Agostini > ; Erik Gabriel Carrillo = ; Fan Zhang > ; Ferruh Yigit ; Harman Kal= ra > ; Harry van Haaren ; Honn= appa Nagarahalli > ; jerinj@marvell.com; Konstantin Ananyev > ; Matan Azrad ; Maxime = Coquelin > ; Narcisa Ana Maria Vasile ; > Nicolas Chautru ; Olivier Matz ; Ori > Kam ; Pallavi Kadam ; Pavan Ni= khilesh > ; Reshma Pattan ; Same= h Gobriel > ; Shijith Thotton ; Sivapr= asad Tummala > ; Stephen Hemminger ; Suanming Mou > ; Sunil Kumar Kori ; thomas@monj= alon.net; > Viacheslav Ovsiienko ; Vladimir Medvedkin > ; Yipeng Wang ; Tyl= er Retzlaff > > Subject: [PATCH v2 09/19] rcu: use rte optional stdatomic API >=20 > Replace the use of gcc builtin __atomic_xxx intrinsics with corresponding= rte_atomic_xxx > optional stdatomic API >=20 > Signed-off-by: Tyler Retzlaff > --- > lib/rcu/rte_rcu_qsbr.c | 48 +++++++++++++++++------------------ > lib/rcu/rte_rcu_qsbr.h | 68 +++++++++++++++++++++++++-------------------= ------ > 2 files changed, 58 insertions(+), 58 deletions(-) >=20 > diff --git a/lib/rcu/rte_rcu_qsbr.c b/lib/rcu/rte_rcu_qsbr.c index 17be93= e..4dc7714 100644 > --- a/lib/rcu/rte_rcu_qsbr.c > +++ b/lib/rcu/rte_rcu_qsbr.c > @@ -102,21 +102,21 @@ > * go out of sync. Hence, additional checks are required. > */ > /* Check if the thread is already registered */ > - old_bmap =3D __atomic_load_n(__RTE_QSBR_THRID_ARRAY_ELM(v, i), > - __ATOMIC_RELAXED); > + old_bmap =3D rte_atomic_load_explicit(__RTE_QSBR_THRID_ARRAY_ELM(v, i), > + rte_memory_order_relaxed); > if (old_bmap & 1UL << id) > return 0; >=20 > do { > new_bmap =3D old_bmap | (1UL << id); > - success =3D __atomic_compare_exchange( > + success =3D rte_atomic_compare_exchange_strong_explicit( > __RTE_QSBR_THRID_ARRAY_ELM(v, i), > - &old_bmap, &new_bmap, 0, > - __ATOMIC_RELEASE, __ATOMIC_RELAXED); > + &old_bmap, new_bmap, > + rte_memory_order_release, rte_memory_order_relaxed); >=20 > if (success) > - __atomic_fetch_add(&v->num_threads, > - 1, __ATOMIC_RELAXED); > + rte_atomic_fetch_add_explicit(&v->num_threads, > + 1, rte_memory_order_relaxed); > else if (old_bmap & (1UL << id)) > /* Someone else registered this thread. > * Counter should not be incremented. > @@ -154,8 +154,8 @@ > * go out of sync. Hence, additional checks are required. > */ > /* Check if the thread is already unregistered */ > - old_bmap =3D __atomic_load_n(__RTE_QSBR_THRID_ARRAY_ELM(v, i), > - __ATOMIC_RELAXED); > + old_bmap =3D rte_atomic_load_explicit(__RTE_QSBR_THRID_ARRAY_ELM(v, i), > + rte_memory_order_relaxed); > if (!(old_bmap & (1UL << id))) > return 0; >=20 > @@ -165,14 +165,14 @@ > * completed before removal of the thread from the list of > * reporting threads. > */ > - success =3D __atomic_compare_exchange( > + success =3D rte_atomic_compare_exchange_strong_explicit( > __RTE_QSBR_THRID_ARRAY_ELM(v, i), > - &old_bmap, &new_bmap, 0, > - __ATOMIC_RELEASE, __ATOMIC_RELAXED); > + &old_bmap, new_bmap, > + rte_memory_order_release, rte_memory_order_relaxed); >=20 > if (success) > - __atomic_fetch_sub(&v->num_threads, > - 1, __ATOMIC_RELAXED); > + rte_atomic_fetch_sub_explicit(&v->num_threads, > + 1, rte_memory_order_relaxed); > else if (!(old_bmap & (1UL << id))) > /* Someone else unregistered this thread. > * Counter should not be incremented. > @@ -227,8 +227,8 @@ >=20 > fprintf(f, " Registered thread IDs =3D "); > for (i =3D 0; i < v->num_elems; i++) { > - bmap =3D __atomic_load_n(__RTE_QSBR_THRID_ARRAY_ELM(v, i), > - __ATOMIC_ACQUIRE); > + bmap =3D rte_atomic_load_explicit(__RTE_QSBR_THRID_ARRAY_ELM(v, i), > + rte_memory_order_acquire); > id =3D i << __RTE_QSBR_THRID_INDEX_SHIFT; > while (bmap) { > t =3D __builtin_ctzl(bmap); > @@ -241,26 +241,26 @@ > fprintf(f, "\n"); >=20 > fprintf(f, " Token =3D %" PRIu64 "\n", > - __atomic_load_n(&v->token, __ATOMIC_ACQUIRE)); > + rte_atomic_load_explicit(&v->token, rte_memory_order_acquire)); >=20 > fprintf(f, " Least Acknowledged Token =3D %" PRIu64 "\n", > - __atomic_load_n(&v->acked_token, __ATOMIC_ACQUIRE)); > + rte_atomic_load_explicit(&v->acked_token, > +rte_memory_order_acquire)); >=20 > fprintf(f, "Quiescent State Counts for readers:\n"); > for (i =3D 0; i < v->num_elems; i++) { > - bmap =3D __atomic_load_n(__RTE_QSBR_THRID_ARRAY_ELM(v, i), > - __ATOMIC_ACQUIRE); > + bmap =3D rte_atomic_load_explicit(__RTE_QSBR_THRID_ARRAY_ELM(v, i), > + rte_memory_order_acquire); > id =3D i << __RTE_QSBR_THRID_INDEX_SHIFT; > while (bmap) { > t =3D __builtin_ctzl(bmap); > fprintf(f, "thread ID =3D %u, count =3D %" PRIu64 ", lock count =3D %= u\n", > id + t, > - __atomic_load_n( > + rte_atomic_load_explicit( > &v->qsbr_cnt[id + t].cnt, > - __ATOMIC_RELAXED), > - __atomic_load_n( > + rte_memory_order_relaxed), > + rte_atomic_load_explicit( > &v->qsbr_cnt[id + t].lock_cnt, > - __ATOMIC_RELAXED)); > + rte_memory_order_relaxed)); > bmap &=3D ~(1UL << t); > } > } > diff --git a/lib/rcu/rte_rcu_qsbr.h b/lib/rcu/rte_rcu_qsbr.h index 87e1b5= 5..9f4aed2 100644 > --- a/lib/rcu/rte_rcu_qsbr.h > +++ b/lib/rcu/rte_rcu_qsbr.h > @@ -63,11 +63,11 @@ > * Given thread id needs to be converted to index into the array and > * the id within the array element. > */ > -#define __RTE_QSBR_THRID_ARRAY_ELM_SIZE (sizeof(uint64_t) * 8) > +#define __RTE_QSBR_THRID_ARRAY_ELM_SIZE (sizeof(RTE_ATOMIC(uint64_t)) * > +8) > #define __RTE_QSBR_THRID_ARRAY_SIZE(max_threads) \ > RTE_ALIGN(RTE_ALIGN_MUL_CEIL(max_threads, \ > __RTE_QSBR_THRID_ARRAY_ELM_SIZE) >> 3, RTE_CACHE_LINE_SIZE) -#define > __RTE_QSBR_THRID_ARRAY_ELM(v, i) ((uint64_t *) \ > +#define __RTE_QSBR_THRID_ARRAY_ELM(v, i) ((uint64_t __rte_atomic *) \ Is it equivalent to ((RTE_ATOMIC(uint64_t) *)? > ((struct rte_rcu_qsbr_cnt *)(v + 1) + v->max_threads) + i) #define > __RTE_QSBR_THRID_INDEX_SHIFT 6 #define __RTE_QSBR_THRID_MASK 0x3f @@ -75= ,13 +75,13 @@ >=20