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DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Jan 2022 09:12:49.7576 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8bb653e5-a083-498e-c557-08d9cf626173 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT013.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB7162 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: pbhagavatula@marvell.com > Sent: Friday, November 5, 2021 6:11 PM > To: Ruifeng Wang ; david.marchand@redhat.com; > jerinj@marvell.com; Yipeng Wang ; Sameh > Gobriel ; Bruce Richardson > ; Vladimir Medvedkin > > Cc: dev@dpdk.org; Pavan Nikhilesh > Subject: [dpdk-dev] [PATCH v5 2/2] hash: unify crc32 selection for x86 an= d > Arm >=20 > From: Pavan Nikhilesh >=20 > Merge crc32 hash calculation public API implementation for x86 and Arm. > Select the best available CRC32 algorithm when unsupported algorithm on a > given CPU architecture is requested by an application. >=20 > Previously, if an application directly includes `rte_crc_arm64.h` without > including `rte_hash_crc.h` it will fail to compile. >=20 > Signed-off-by: Pavan Nikhilesh > --- > .../{rte_crc_arm64.h =3D> hash_crc_arm64.h} | 69 +------- > lib/hash/hash_crc_x86.h | 89 ++++++++++ > lib/hash/meson.build | 1 - > lib/hash/rte_hash_crc.h | 154 +++++------------- > 4 files changed, 143 insertions(+), 170 deletions(-) rename > lib/hash/{rte_crc_arm64.h =3D> hash_crc_arm64.h} (65%) >=20 > diff --git a/lib/hash/rte_hash_crc.h b/lib/hash/rte_hash_crc.h index > 1cc8f84fe2..ea5ef302b8 100644 > --- a/lib/hash/rte_hash_crc.h > +++ b/lib/hash/rte_hash_crc.h > @@ -16,10 +16,12 @@ extern "C" { > #endif >=20 > #include > -#include > -#include > + > #include > #include > +#include > +#include > +#include >=20 > #include >=20 > @@ -32,137 +34,71 @@ extern "C" { > static uint8_t crc32_alg =3D CRC32_SW; >=20 > #if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) - > #include "rte_crc_arm64.h" > -#else > +#include "hash_crc_arm64.h" > +#elif defined(RTE_ARCH_X86) > #include "hash_crc_x86.h" > +#endif >=20 > /** > - * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash > + * Allow or disallow use of SSE4.2/ARMv8 intrinsics for CRC32 hash > * calculation. > * > * @param alg > * An OR of following flags: > - * - (CRC32_SW) Don't use SSE4.2 intrinsics > + * - (CRC32_SW) Don't use SSE4.2/ARMv8 intrinsics (default non- > [x86/ARMv8]) > * - (CRC32_SSE42) Use SSE4.2 intrinsics if available > - * - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (defau= lt) > + * - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (defau= lt x86) > + * - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available (default ARMv8= ) > * > */ > static inline void > rte_hash_crc_set_alg(uint8_t alg) > { > -#if defined(RTE_ARCH_X86) > - if (alg =3D=3D CRC32_SSE42_x64 && > - !rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T)) > - alg =3D CRC32_SSE42; > -#endif > - crc32_alg =3D alg; > -} > - > -/* Setting the best available algorithm */ > -RTE_INIT(rte_hash_crc_init_alg) > -{ > - rte_hash_crc_set_alg(CRC32_SSE42_x64); > -} > - > -/** > - * Use single crc32 instruction to perform a hash on a byte value. > - * Fall back to software crc32 implementation in case SSE4.2 is > - * not supported > - * > - * @param data > - * Data to perform hash on. > - * @param init_val > - * Value to initialise hash generator. > - * @return > - * 32bit calculated hash value. > - */ > -static inline uint32_t > -rte_hash_crc_1byte(uint8_t data, uint32_t init_val) -{ > + switch (alg) { > + case CRC32_SSE42_x64: > + case CRC32_SSE42: > #if defined RTE_ARCH_X86 > - if (likely(crc32_alg & CRC32_SSE42)) > - return crc32c_sse42_u8(data, init_val); > + if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T)) > + crc32_alg =3D CRC32_SSE42; > + else > + crc32_alg =3D alg; > #endif > - > - return crc32c_1byte(data, init_val); > -} > - > -/** > - * Use single crc32 instruction to perform a hash on a 2 bytes value. > - * Fall back to software crc32 implementation in case SSE4.2 is > - * not supported > - * > - * @param data > - * Data to perform hash on. > - * @param init_val > - * Value to initialise hash generator. > - * @return > - * 32bit calculated hash value. > - */ > -static inline uint32_t > -rte_hash_crc_2byte(uint16_t data, uint32_t init_val) -{ -#if defined > RTE_ARCH_X86 > - if (likely(crc32_alg & CRC32_SSE42)) > - return crc32c_sse42_u16(data, init_val); > +#if defined RTE_ARCH_ARM64 > + RTE_LOG(WARNING, HASH, > + "Incorrect CRC32 algorithm requested setting best > available algorithm on the architecture\n"); > + rte_hash_crc_set_alg(CRC32_ARM64); > +#endif > + break; > + case CRC32_ARM64: > +#if defined RTE_ARCH_ARM64 > + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32)) > + crc32_alg =3D CRC32_ARM64; > #endif > + #if defined RTE_ARCH_X86 > + RTE_LOG(WARNING, HASH, > + "Incorrect CRC32 algorithm requested setting best > available algorithm on the architecture\n"); > + rte_hash_crc_set_alg(CRC32_SSE42_x64); > #endif > + break; I edited this part for readability.=20 The 'break' need to be inside #if, so algorithm can fallback to CRC32_SW w= hen CRC32 feature is not available on hardware. > + case CRC32_SW: > + default: > + crc32_alg =3D CRC32_SW; > + break; > + } > } >=20 > -/** > - * Use single crc32 instruction to perform a hash on a 8 byte value. > - * Fall back to software crc32 implementation in case SSE4.2 is > - * not supported > - * > - * @param data > - * Data to perform hash on. > - * @param init_val > - * Value to initialise hash generator. > - * @return > - * 32bit calculated hash value. > - */ > -static inline uint32_t > -rte_hash_crc_8byte(uint64_t data, uint32_t init_val) > +/* Setting the best available algorithm */ > +RTE_INIT(rte_hash_crc_init_alg) > { > -#ifdef RTE_ARCH_X86_64 > - if (likely(crc32_alg =3D=3D CRC32_SSE42_x64)) > - return crc32c_sse42_u64(data, init_val); > -#endif > - > -#if defined RTE_ARCH_X86 > - if (likely(crc32_alg & CRC32_SSE42)) > - return crc32c_sse42_u64_mimic(data, init_val); > +#if defined(RTE_ARCH_X86) > + rte_hash_crc_set_alg(CRC32_SSE42_x64); > +#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) > + rte_hash_crc_set_alg(CRC32_ARM64); > +#else > + rte_hash_crc_set_alg(CRC32_SW); > #endif > - > - return crc32c_2words(data, init_val); > } >=20 > -#endif > - > /** > * Calculate CRC32 hash on user-supplied byte array. > * > -- > 2.17.1