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DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Oct 2021 09:21:57.2046 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b5b3d006-68af-45f8-fa25-08d99218bb85 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT026.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR08MB4951 Subject: Re: [dpdk-dev] [PATCH v4 2/2] hash: unify crc32 selection for x86 and Arm X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: pbhagavatula@marvell.com > Sent: Monday, October 4, 2021 1:53 PM > To: Ruifeng Wang ; > konstantin.ananyev@intel.com; jerinj@marvell.com; Yipeng Wang > ; Sameh Gobriel ; > Bruce Richardson ; Vladimir Medvedkin > > Cc: dev@dpdk.org; Pavan Nikhilesh > Subject: [dpdk-dev] [PATCH v4 2/2] hash: unify crc32 selection for x86 an= d > Arm >=20 > From: Pavan Nikhilesh >=20 > Merge crc32 hash calculation public API implementation for x86 and Arm. > Select the best available CRC32 algorithm when unsupported algorithm on a > given CPU architecture is requested by an application. >=20 > Previously, if an application directly includes `rte_crc_arm64.h` without > including `rte_hash_crc.h` it will fail to compile. >=20 > Signed-off-by: Pavan Nikhilesh > --- > lib/hash/hash_crc_arm64.h | 48 ++++++++++ > lib/hash/meson.build | 1 - > lib/hash/rte_crc_arm64.h | 183 -------------------------------------- > lib/hash/rte_hash_crc.h | 81 +++++++++++++---- > 4 files changed, 112 insertions(+), 201 deletions(-) create mode 100644 > lib/hash/hash_crc_arm64.h delete mode 100644 lib/hash/rte_crc_arm64.h >=20 > diff --git a/lib/hash/rte_hash_crc.h b/lib/hash/rte_hash_crc.h index > 1cc8f84fe2..a51f6d3cc4 100644 > --- a/lib/hash/rte_hash_crc.h > +++ b/lib/hash/rte_hash_crc.h > @@ -16,10 +16,18 @@ extern "C" { > #endif >=20 > #include > -#include > -#include > + > #include > #include > +#include > +#include > +#include > + > +#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) > #include > +"hash_crc_arm64.h" > +#elif defined(RTE_ARCH_X86) > +#include "hash_crc_x86.h" > +#endif >=20 > #include >=20 > @@ -31,37 +39,64 @@ extern "C" { >=20 > static uint8_t crc32_alg =3D CRC32_SW; >=20 > -#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) - > #include "rte_crc_arm64.h" > -#else > -#include "hash_crc_x86.h" > - > /** > - * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash > + * Allow or disallow use of SSE4.2/ARMv8 intrinsics for CRC32 hash > * calculation. > * > * @param alg > * An OR of following flags: > - * - (CRC32_SW) Don't use SSE4.2 intrinsics > + * - (CRC32_SW) Don't use SSE4.2/ARMv8 intrinsics (default non- > [x86/ARMv8]) > * - (CRC32_SSE42) Use SSE4.2 intrinsics if available > - * - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (defau= lt) > + * - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (defau= lt x86) > + * - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available (default ARMv8= ) > * > */ > static inline void > rte_hash_crc_set_alg(uint8_t alg) hash_crc_arm64.h and hash_crc_x86.h are there. How about leaving only funct= ion declaration in rte_hash_crc.h, and have implementations in arch specific files? By this way, ifdefs in the implementation can be dropped. > { > -#if defined(RTE_ARCH_X86) > - if (alg =3D=3D CRC32_SSE42_x64 && > - !rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T)) > - alg =3D CRC32_SSE42; > + switch (alg) { > + case CRC32_SSE42_x64: > + case CRC32_SSE42: > +#if defined RTE_ARCH_X86 > + if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T)) > + crc32_alg =3D CRC32_SSE42; > + else > + crc32_alg =3D alg; > +#endif > +#if defined RTE_ARCH_ARM64 > + RTE_LOG(WARNING, HASH, > + "Incorrect CRC32 algorithm requested setting best > available algorithm on the architecture\n"); > + rte_hash_crc_set_alg(CRC32_ARM64); > #endif > - crc32_alg =3D alg; > + break; > + case CRC32_ARM64: > +#if defined RTE_ARCH_ARM64 > + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32)) > + crc32_alg =3D CRC32_ARM64; > +#endif > +#if defined RTE_ARCH_X86 > + RTE_LOG(WARNING, HASH, > + "Incorrect CRC32 algorithm requested setting best > available algorithm on the architecture\n"); > + rte_hash_crc_set_alg(CRC32_SSE42_x64); > +#endif > + break; > + case CRC32_SW: > + default: > + crc32_alg =3D CRC32_SW; > + break; > + } > } >=20 > /* Setting the best available algorithm */ > RTE_INIT(rte_hash_crc_init_alg) > { > +#if defined(RTE_ARCH_X86) > rte_hash_crc_set_alg(CRC32_SSE42_x64); > +#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) > + rte_hash_crc_set_alg(CRC32_ARM64); > +#else > + rte_hash_crc_set_alg(CRC32_SW); > +#endif > } >=20 > /** > @@ -82,6 +117,9 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val) #= if Same for these APIs. > defined RTE_ARCH_X86 > if (likely(crc32_alg & CRC32_SSE42)) > return crc32c_sse42_u8(data, init_val); > +#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) > + if (likely(crc32_alg & CRC32_ARM64)) > + return crc32c_arm64_u8(data, init_val); > #endif >=20 > return crc32c_1byte(data, init_val); > @@ -105,6 +143,9 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val) > #if defined RTE_ARCH_X86 > if (likely(crc32_alg & CRC32_SSE42)) > return crc32c_sse42_u16(data, init_val); > +#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) > + if (likely(crc32_alg & CRC32_ARM64)) > + return crc32c_arm64_u16(data, init_val); > #endif >=20 > return crc32c_2bytes(data, init_val); > @@ -128,6 +169,9 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val) > #if defined RTE_ARCH_X86 > if (likely(crc32_alg & CRC32_SSE42)) > return crc32c_sse42_u32(data, init_val); > +#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) > + if (likely(crc32_alg & CRC32_ARM64)) > + return crc32c_arm64_u32(data, init_val); > #endif >=20 > return crc32c_1word(data, init_val); > @@ -158,11 +202,14 @@ rte_hash_crc_8byte(uint64_t data, uint32_t init_val= ) > return crc32c_sse42_u64_mimic(data, init_val); #endif >=20 > +#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) > + if (likely(crc32_alg & CRC32_ARM64)) > + return crc32c_arm64_u64(data, init_val); #endif > + > return crc32c_2words(data, init_val); > } >=20 > -#endif > - > /** > * Calculate CRC32 hash on user-supplied byte array. > * > -- > 2.17.1