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DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jun 2023 04:29:37.4032 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5b3bc55e-3d49-4e24-54ec-08db67d8f7fa X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT027.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8PR08MB5449 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Pavan Nikhilesh Bhagavatula > Sent: Wednesday, June 7, 2023 11:12 PM > To: Ruifeng Wang ; bruce.richardson@intel.com > Cc: dev@dpdk.org; jerinj@marvell.com; Honnappa Nagarahalli ; > Feifei Wang ; nd > Subject: RE: [EXT] [PATCH 1/2] config/arm: update config for Neoverse N2 >=20 > > Updated maximum number of lcores and numa nodes to support platforms > > with multiple numa nodes. > > Added mcpu compiler option. > > > > Signed-off-by: Ruifeng Wang > > Reviewed-by: Feifei Wang > > --- > > config/arm/meson.build | 5 +++-- > > 1 file changed, 3 insertions(+), 2 deletions(-) > > > > diff --git a/config/arm/meson.build b/config/arm/meson.build index > > 5213434ca4..9e55e9f2a4 100644 > > --- a/config/arm/meson.build > > +++ b/config/arm/meson.build > > @@ -91,11 +91,12 @@ part_number_config_arm =3D { > > '0xd49': { > > 'march': 'armv8.5-a', > > 'march_features': ['sve2'], > > + 'compiler_options': ['-mcpu=3Dneoverse-n2'], >=20 > Hi Ruifeng, Hi Pavan, > I see the following warning when compiling with GCC 12 >=20 > cc1: warning: switch '-mcpu=3Dneoverse-n2' conflicts with '-march=3Darmv8= .5-a+sve2+crypto' > switch >=20 > Removing 'armv8.5-a' from the list makes the warning go away but what's t= he correct march > for neoverse-n2? > Armv9.0-a is not a supported march flag in GCC. Thanks for pointing this out. Neoverse-n2 is v9.0-a. The corresponding march flag in GCC is 'armv9-a' [1]= .=20 'armv8.5-a' should be removed from the list. It was used when armv9-a/neove= rse-n2 is not available in compilers. [1] https://gcc.gnu.org/onlinedocs/gcc-12.3.0/gcc/AArch64-Options.html >=20 > > 'flags': [ > > ['RTE_MACHINE', '"neoverse-n2"'], > > ['RTE_ARM_FEATURE_ATOMICS', true], > > - ['RTE_MAX_LCORE', 64], > > - ['RTE_MAX_NUMA_NODES', 1] > > + ['RTE_MAX_LCORE', 128], > > + ['RTE_MAX_NUMA_NODES', 2] > > ] > > } > > } > > -- > > 2.25.1