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DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2023 02:48:34.9087 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 442410d4-a2b5-472c-2175-08db33edeb39 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT024.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR08MB6240 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Thanks for the reviewing. > -----Original Message----- > From: Stephen Hemminger > Sent: Thursday, March 30, 2023 11:05 PM > To: Feifei Wang > Cc: dev@dpdk.org; konstantin.v.ananyev@yandex.ru; > mb@smartsharesystems.com; nd > Subject: Re: [PATCH v5 0/3] Recycle buffers from Tx to Rx >=20 > On Thu, 30 Mar 2023 14:29:36 +0800 > Feifei Wang wrote: >=20 > > Currently, the transmit side frees the buffers into the lcore cache > > and the receive side allocates buffers from the lcore cache. The > > transmit side typically frees 32 buffers resulting in 32*8=3D256B of > > stores to lcore cache. The receive side allocates 32 buffers and > > stores them in the receive side software ring, resulting in 32*8=3D256B > > of stores and 256B of load from the lcore cache. > > > > This patch proposes a mechanism to avoid freeing to/allocating from > > the lcore cache. i.e. the receive side will free the buffers from > > transmit side directly into its software ring. This will avoid the > > 256B of loads and stores introduced by the lcore cache. It also frees > > up the cache lines used by the lcore cache. And we can call this mode > > as buffer recycle mode. >=20 >=20 > My naive reading of this is that lcore cache update is slow on ARM so you= are > introducing yet another cache. Perhaps a better solution would be to figu= re > out/optimize the lcore cache to work better. >From my point of view, 'recycle buffer' is a strategic optimization. It red= uces the operation of a buffer. Not only arm, but also x86 and other architecture can benefit= from this. For example, we can see x86 sse path performance improvement in cover letter test result= s. >=20 > Adding another layer of abstraction is not going to help everyone and the > implementation you chose requires modifications to drivers to get it to w= ork. >=20 We did not change the original driver mechanism. Recycle buffer can be look= ed at a feature for pmd, if the user needs higher performance, he/she can cho= ose to call the API in the application to enable it. > In current form, this is not acceptable.