From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id DD9492B83 for ; Thu, 2 Jun 2016 08:43:49 +0200 (CEST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP; 01 Jun 2016 23:43:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,405,1459839600"; d="scan'208";a="993588570" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga002.fm.intel.com with ESMTP; 01 Jun 2016 23:43:48 -0700 Received: from fmsmsx119.amr.corp.intel.com (10.18.124.207) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 1 Jun 2016 23:43:48 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX119.amr.corp.intel.com (10.18.124.207) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 1 Jun 2016 23:43:48 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.150]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.181]) with mapi id 14.03.0248.002; Thu, 2 Jun 2016 14:43:46 +0800 From: "Wang, Xiao W" To: "Xing, Beilei" , "Lu, Wenzhuo" CC: "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH] e1000: configure VLAN TPID Thread-Index: AQHRm6usj/b/qLCkHkeE6fCBDknrYJ/V+AXg Date: Thu, 2 Jun 2016 06:43:46 +0000 Message-ID: References: <1461228948-18820-1-git-send-email-beilei.xing@intel.com> In-Reply-To: <1461228948-18820-1-git-send-email-beilei.xing@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_IC x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMzljZDNjZjAtNTg2My00YWI5LThlYjQtMTM1OWYwYjAxODE1IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IlJZdGZnb0o4aHZmeVIwa0ZRc04rRU5vNmpVSThFeDRTVTY5WDZORTExMlk9In0= x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] e1000: configure VLAN TPID X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 02 Jun 2016 06:43:50 -0000 Hi Beilei, > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Beilei Xing > Sent: Thursday, April 21, 2016 4:56 PM > To: Lu, Wenzhuo > Cc: dev@dpdk.org; Xing, Beilei > Subject: [dpdk-dev] [PATCH] e1000: configure VLAN TPID >=20 > This patch enables configuring the ether types of both inner and outer VL= ANs. > Note that TPID of single or inner VLAN is read only. >=20 > Signed-off-by: Beilei Xing > --- > drivers/net/e1000/igb_ethdev.c | 34 +++++++++++++++++++++++++++++++--- > 1 file changed, 31 insertions(+), 3 deletions(-) >=20 > diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethde= v.c > index e0053fe..c957fbe 100644 > --- a/drivers/net/e1000/igb_ethdev.c > +++ b/drivers/net/e1000/igb_ethdev.c > @@ -86,6 +86,14 @@ > #define E1000_INCVALUE_82576 (16 << IGB_82576_TSYNC_SHIFT) > #define E1000_TSAUXC_DISABLE_SYSTIME 0x80000000 >=20 > +/* CTRL_EXT bit mask*/ > +#define E1000_CTRL_EXT_EXT_VLAN (1 << 26) > + > +/* VLAN Ether Type bit mask */ > +#define E1000_VET_VET_EXT 0xFFFF0000 > + > +#define E1000_VET_VET_EXT_SHIFT 16 > + > static int eth_igb_configure(struct rte_eth_dev *dev); static int > eth_igb_start(struct rte_eth_dev *dev); static void eth_igb_stop(struct > rte_eth_dev *dev); @@ -2242,13 +2250,33 @@ eth_igb_vlan_tpid_set(struct > rte_eth_dev *dev, { > struct e1000_hw *hw =3D > E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); > - uint32_t reg =3D ETHER_TYPE_VLAN; > + uint32_t reg; > + uint32_t qinq; > int ret =3D 0; >=20 > + qinq =3D E1000_READ_REG(hw, E1000_CTRL_EXT); > + qinq &=3D E1000_CTRL_EXT_EXT_VLAN; > + > switch (vlan_type) { > case ETH_VLAN_TYPE_INNER: > - reg |=3D (tpid << 16); > - E1000_WRITE_REG(hw, E1000_VET, reg); > + if (qinq) > + PMD_DRV_LOG(WARNING, > + "inner vlan ether type is read-only\n"); Add: ret =3D -ENOTSUP or something else, so that the programmer can handle = it. The same for below. > + else { > + PMD_DRV_LOG(ERR, "not set QinQ on yet\n"); > + ret =3D -EIO; > + } > + break; > + case ETH_VLAN_TYPE_OUTER: > + if (qinq) { > + reg =3D E1000_READ_REG(hw, E1000_VET); > + reg =3D (reg & (~E1000_VET_VET_EXT)) | > + ((uint32_t)tpid << E1000_VET_VET_EXT_SHIFT); > + E1000_WRITE_REG(hw, E1000_VET, reg); > + } else > + PMD_DRV_LOG(WARNING, > + "single vlan ether type is read-only\n"); > + > break; > default: > ret =3D -EINVAL; > -- > 2.5.0 Since both inner and outer tpid are considered in this patch, the comment i= n rte_ethdev.h "vlan_tpid_set; /**< Outer VLAN TPID Setup. */" should be= changed accordingly. Best Regards, Xiao