From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id B0BDDA0471 for ; Mon, 17 Jun 2019 10:28:05 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7CE4C1BE6A; Mon, 17 Jun 2019 10:28:05 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 912EF1BB43 for ; Mon, 17 Jun 2019 10:28:03 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Jun 2019 01:28:02 -0700 X-ExtLoop1: 1 Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga006.fm.intel.com with ESMTP; 17 Jun 2019 01:28:02 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 17 Jun 2019 01:28:01 -0700 Received: from shsmsx106.ccr.corp.intel.com ([169.254.10.89]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.225]) with mapi id 14.03.0439.000; Mon, 17 Jun 2019 16:28:01 +0800 From: "Wang, Xiao W" To: "Zhao1, Wei" , "Yang, Qiming" , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v2 1/3] net/ice: enable switch filter Thread-Index: AQHVIPPYmQ10h/ddYUSJyxdI55YKGaaZNCbggAEwB4CABSTFEA== Date: Mon, 17 Jun 2019 08:28:00 +0000 Message-ID: References: <1559552722-8970-1-git-send-email-qiming.yang@intel.com> <20190612075029.109914-1-qiming.yang@intel.com> <20190612075029.109914-2-qiming.yang@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZThlMDk2MDMtMGQxZi00ZTkzLWI3ZmUtNTQ0Yzc1MzBiMjIxIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoidXp1V1wvQWtveXp5Z3VDZ2tTQUxRNUc0Y3JWUE04dWZvMzlWTzBuWTZBa1U0bUJ3VWpnSlwveVFpR1RYSU5UMTFpIn0= dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 1/3] net/ice: enable switch filter X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Wei, > -----Original Message----- > From: Zhao1, Wei > Sent: Friday, June 14, 2019 5:47 PM > To: Wang, Xiao W ; Yang, Qiming > ; dev@dpdk.org > Subject: RE: [dpdk-dev] [PATCH v2 1/3] net/ice: enable switch filter >=20 > Hi=1B$B!$=1B(B xiao >=20 > > -----Original Message----- > > From: Wang, Xiao W > > Sent: Thursday, June 13, 2019 4:24 PM > > To: Yang, Qiming ; dev@dpdk.org > > Cc: Zhao1, Wei > > Subject: RE: [dpdk-dev] [PATCH v2 1/3] net/ice: enable switch filter > > > > Hi, > > > > > -----Original Message----- > > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Qiming Yang > > > Sent: Wednesday, June 12, 2019 3:50 PM > > > To: dev@dpdk.org > > > Cc: Zhao1, Wei > > > Subject: [dpdk-dev] [PATCH v2 1/3] net/ice: enable switch filter > > > > > > From: wei zhao > > > > > > The patch enables the backend of rte_flow. It transfers rte_flow_xxx > > > to device specific data structure and configures packet process > > > engine's binary classifier > > > (switch) properly. > > > > > > Signed-off-by: Wei Zhao > > > --- > > > drivers/net/ice/Makefile | 1 + > > > drivers/net/ice/ice_ethdev.h | 6 + > > > drivers/net/ice/ice_switch_filter.c | 502 > > > ++++++++++++++++++++++++++++++++++++ > > > drivers/net/ice/ice_switch_filter.h | 28 ++ > > > drivers/net/ice/meson.build | 3 +- > > > 5 files changed, 539 insertions(+), 1 deletion(-) create mode 10064= 4 > > > drivers/net/ice/ice_switch_filter.c > > > create mode 100644 drivers/net/ice/ice_switch_filter.h > > > > > > diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile inde= x > > > 0e5c55e..b10d826 100644 > > > --- a/drivers/net/ice/Makefile > > > +++ b/drivers/net/ice/Makefile > > > @@ -60,6 +60,7 @@ ifeq ($(CONFIG_RTE_ARCH_X86), y) > > > SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) +=3D ice_rxtx_vec_sse.c endif > > > > > > +SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) +=3D ice_switch_filter.c > > > ifeq ($(findstring > > > > RTE_MACHINE_CPUFLAG_AVX2,$(CFLAGS)),RTE_MACHINE_CPUFLAG_AVX2) > > > CC_AVX2_SUPPORT=3D1 > > > else > > > diff --git a/drivers/net/ice/ice_ethdev.h > > > b/drivers/net/ice/ice_ethdev.h index 1385afa..67a358a 100644 > > > --- a/drivers/net/ice/ice_ethdev.h > > > +++ b/drivers/net/ice/ice_ethdev.h > > > @@ -234,6 +234,12 @@ struct ice_vsi { > > > bool offset_loaded; > > > }; > > > > > > +/* Struct to store flow created. */ > > > +struct rte_flow { > > > + TAILQ_ENTRY(rte_flow) node; > > > +void *rule; > > > +}; > > > + > > > struct ice_pf { > > > struct ice_adapter *adapter; /* The adapter this PF associate to */ > > > struct ice_vsi *main_vsi; /* pointer to main VSI structure */ diff > > > --git a/drivers/net/ice/ice_switch_filter.c > > > b/drivers/net/ice/ice_switch_filter.c > > > new file mode 100644 > > > index 0000000..e679675 > > > --- /dev/null > > > +++ b/drivers/net/ice/ice_switch_filter.c [...] > > > + RTE_FLOW_ITEM_TYPE_END; item++, i++) { > > > > It seems we don't need the "i" variable. >=20 > Ok, Updated in v3 >=20 > > > > > + item_type =3D item->type; > > > + > > > + switch (item_type) { > > > + case RTE_FLOW_ITEM_TYPE_ETH: > > > + eth_spec =3D item->spec; > > > + eth_mask =3D item->mask; > > > + if (eth_spec && eth_mask) { > > > + list[t].type =3D (tun_type =3D=3D ICE_NON_TUN) ? > > > + ICE_MAC_OFOS : ICE_MAC_IL; > > > + for (j =3D 0; j < RTE_ETHER_ADDR_LEN; j++) { > > > + if (eth_mask->src.addr_bytes[j] =3D=3D > > > + UINT8_MAX) { > > > + list[t].h_u.eth_hdr. > > > + src_addr[j] =3D > > > + eth_spec->src.addr_bytes[j]; > > > + list[t].m_u.eth_hdr. > > > + src_addr[j] =3D > > > + eth_mask->src.addr_bytes[j]; > > > + } > > > + if (eth_mask->dst.addr_bytes[j] =3D=3D > > > + UINT8_MAX) { > > > + list[t].h_u.eth_hdr. > > > + dst_addr[j] =3D > > > + eth_spec->dst.addr_bytes[j]; > > > + list[t].m_u.eth_hdr. > > > + dst_addr[j] =3D > > > + eth_mask->dst.addr_bytes[j]; > > > + } > > > + } > > > + if (eth_mask->type =3D=3D UINT16_MAX) { > > > + list[t].h_u.eth_hdr.ethtype_id =3D > > > + rte_be_to_cpu_16(eth_spec->type); > > > + list[t].m_u.eth_hdr.ethtype_id =3D > > > + UINT16_MAX; > > > + } > > > + t++; > > > > A lot of "t++" below, can we move it outside the switch{ } to have only= one > "t++"? >=20 > By now, we can not, because share code can not handle if (!eth_spec > && !eth_mask) case, if we t++ > For that case, that item will put into list[t], and share code will repor= t error. The blow "else if" branch has no effect at all, we can just remove it. BRs, Xiao > > > > > + } else if (!eth_spec && !eth_mask) { > > > + list[t].type =3D (tun_type =3D=3D ICE_NON_TUN) ? > > > + ICE_MAC_OFOS : ICE_MAC_IL; > > > + } > > > + break; [...]