From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id EAFA9A04FB; Thu, 26 Dec 2019 03:06:20 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E85F91BF7A; Thu, 26 Dec 2019 03:06:19 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 47DA31BF73; Thu, 26 Dec 2019 03:06:17 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Dec 2019 18:06:16 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,357,1571727600"; d="scan'208";a="250229373" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga002.fm.intel.com with ESMTP; 25 Dec 2019 18:06:15 -0800 Received: from fmsmsx155.amr.corp.intel.com (10.18.116.71) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 25 Dec 2019 18:06:15 -0800 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX155.amr.corp.intel.com (10.18.116.71) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 25 Dec 2019 18:06:15 -0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.19]) by shsmsx102.ccr.corp.intel.com ([169.254.2.109]) with mapi id 14.03.0439.000; Thu, 26 Dec 2019 10:06:13 +0800 From: "Li, Xiaoyun" To: "Zhang, Qi Z" , "Xing, Beilei" , "Ye, Xiaolong" , "Loftus, Ciara" , "dev@dpdk.org" CC: "stable@dpdk.org" Thread-Topic: [PATCH v2] net/i40e: fix TSO pkt exceeds allowed buf size issue Thread-Index: AQHVuwFetWYZ02UX00uUvHEa9Q3JpafLIZaAgACKZpA= Date: Thu, 26 Dec 2019 02:06:12 +0000 Message-ID: References: <20191225085532.19520-1-xiaoyun.li@intel.com> <039ED4275CED7440929022BC67E7061153DF389B@SHSMSX105.ccr.corp.intel.com> In-Reply-To: <039ED4275CED7440929022BC67E7061153DF389B@SHSMSX105.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2] net/i40e: fix TSO pkt exceeds allowed buf size issue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Sure. Will fix them in v3. Thanks. > -----Original Message----- > From: Zhang, Qi Z > Sent: Thursday, December 26, 2019 09:51 > To: Li, Xiaoyun ; Xing, Beilei ; Ye, > Xiaolong ; Loftus, Ciara ; > dev@dpdk.org > Cc: stable@dpdk.org > Subject: RE: [PATCH v2] net/i40e: fix TSO pkt exceeds allowed buf size is= sue >=20 > HI Xiaoyun: >=20 > Overall looks good to me, some minor capture inline >=20 >=20 > > -----Original Message----- > > From: Li, Xiaoyun > > Sent: Wednesday, December 25, 2019 4:56 PM > > To: Zhang, Qi Z ; Xing, Beilei > > ; Ye, Xiaolong ; Loftus, > > Ciara ; dev@dpdk.org > > Cc: Li, Xiaoyun ; stable@dpdk.org > > Subject: [PATCH v2] net/i40e: fix TSO pkt exceeds allowed buf size > > issue > > > > Hardware limits that max buffer size per tx descriptor should be > > (16K-1)B. So when TSO enabled, the mbuf data size may exceed the limit > > and cause malicious behaviour to the NIC. This patch fixes this issue > > by using more tx >=20 > Behavior >=20 > > descs for this kind of large buffer. > > > > Fixes: 4861cde46116 ("i40e: new poll mode driver") > > Cc: stable@dpdk.org > > > > Signed-off-by: Xiaoyun Li > > --- > > v2: > > * Each pkt can have several segments so the needed tx descs should > > sum > > * all segments up. > > --- > > drivers/net/i40e/i40e_rxtx.c | 44 > > +++++++++++++++++++++++++++++++++++- > > 1 file changed, 43 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/net/i40e/i40e_rxtx.c > > b/drivers/net/i40e/i40e_rxtx.c index > > 17dc8c78f..ce95d8c20 100644 > > --- a/drivers/net/i40e/i40e_rxtx.c > > +++ b/drivers/net/i40e/i40e_rxtx.c > > @@ -989,6 +989,23 @@ i40e_set_tso_ctx(struct rte_mbuf *mbuf, union > > i40e_tx_offload tx_offload) > > return ctx_desc; > > } > > > > +/* HW requires that Tx buffer size ranges from 1B up to (16K-1)B. */ > > +#define I40E_MAX_DATA_PER_TXD (16 * 1024 - 1) >=20 > Since this is limited by the 14 bit buffer size on Rx descriptor. >=20 > Is it better to reuse exist macro to define the max buf size? >=20 > #define I40E_MAX_DATA_PER_TXD \ > I40E_TXD_QW1_TX_BUF_SZ_MASK >> > I40E_TXD_QW1_TX_BUF_SZ_SHIFT >=20 > Regards > Qi >=20 > > +/* Calculate the number of TX descriptors needed for each pkt */ > > +static inline uint16_t i40e_calc_pkt_desc(struct rte_mbuf *tx_pkt) { > > + struct rte_mbuf *txd =3D tx_pkt; > > + uint16_t count =3D 0; > > + > > + while (txd !=3D NULL) { > > + count +=3D DIV_ROUND_UP(txd->data_len, > > I40E_MAX_DATA_PER_TXD); > > + txd =3D txd->next; > > + } > > + > > + return count; > > +} > > + > > uint16_t > > i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t > > nb_pkts) { @@ -1046,8 +1063,15 @@ i40e_xmit_pkts(void *tx_queue, > > struct rte_mbuf **tx_pkts, uint16_t nb_pkts) > > * The number of descriptors that must be allocated for > > * a packet equals to the number of the segments of that > > * packet plus 1 context descriptor if needed. > > + * Recalculate the needed tx descs when TSO enabled in case > > + * the mbuf data size exceeds max data size that hw allows > > + * per tx desc. > > */ > > - nb_used =3D (uint16_t)(tx_pkt->nb_segs + nb_ctx); > > + if (ol_flags & PKT_TX_TCP_SEG) > > + nb_used =3D (uint16_t)(i40e_calc_pkt_desc(tx_pkt) + > > + nb_ctx); > > + else > > + nb_used =3D (uint16_t)(tx_pkt->nb_segs + nb_ctx); > > tx_last =3D (uint16_t)(tx_id + nb_used - 1); > > > > /* Circular ring */ > > @@ -1160,6 +1184,24 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf > > **tx_pkts, uint16_t nb_pkts) > > slen =3D m_seg->data_len; > > buf_dma_addr =3D rte_mbuf_data_iova(m_seg); > > > > + while ((ol_flags & PKT_TX_TCP_SEG) && > > + unlikely(slen > I40E_MAX_DATA_PER_TXD)) { > > + txd->buffer_addr =3D > > + rte_cpu_to_le_64(buf_dma_addr); > > + txd->cmd_type_offset_bsz =3D > > + i40e_build_ctob(td_cmd, > > + td_offset, I40E_MAX_DATA_PER_TXD, > > + td_tag); > > + > > + buf_dma_addr +=3D I40E_MAX_DATA_PER_TXD; > > + slen -=3D I40E_MAX_DATA_PER_TXD; > > + > > + txe->last_id =3D tx_last; > > + tx_id =3D txe->next_id; > > + txe =3D txn; > > + txd =3D &txr[tx_id]; > > + txn =3D &sw_ring[txe->next_id]; > > + } > > PMD_TX_LOG(DEBUG, "mbuf: %p, TDD[%u]:\n" > > "buf_dma_addr: %#"PRIx64";\n" > > "td_cmd: %#x;\n" > > -- > > 2.17.1